© 2011 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim 4491 www.advmat.de www.MaterialsViews.com COMMUNICATION wileyonlinelibrary.com Adv. Mater. 2011, 23, 4491–4496 Prof. R. Martins, R. Barros, Dr. L. Pereira, Dr. P. Barquinha, N. Correia, R. Costa, Dr. I. Ferreira, Prof. E. Fortunato Departamento de Ciência dos Materiais CENIMAT/I3N, Faculdade de Ciências e Tecnologia FCT, CEMOP/Uninova Universidade Nova de Lisboa, 2829-516 Caparica, Portugal E-mail: rm@uninova.pt; emf@fct.unl.pt Prof. A. Nathan, Dr. A. Ahnood London Center for Nanotechnology University College London London WC1H 0AH, UK E-mail: anathan@ucl.ac.uk DOI: 10.1002/adma.201102232 One of today’s challenges in electronics is to produce port- able, flexible, low cost, and easily recyclable products, [1] such as paper [2] since they do not require the high process temperatures used in crystalline silicon (c-Si) technologies. In addition, the devices should have low power energy consumption to allow densely packed integrated circuits for a plethora of applications such as computer memory chips, digital logic and microproc- essors, to (linear) analogue circuits, among others, to fuel the next-generation microelectronics revolution for information and communication technologies. [3] For illustrative purposes, we consider a temporary register as an example. In a static cir- cuit the contents of the register remain fixed until new infor- mation arrives to be stored and remains active unless the power goes out or the computer is turned off. In a dynamic circuit, the contents of the register leak away and must be periodically refreshed. The advantage of dynamic circuits is that they do not draw current between refreshing; the disadvantage is that refreshing requires additional circuitry including clocks to syn- chronize the refresh cycle with the operation of the register. [3,4] As done in the past for c-Si, a complementary metal oxide semi- conductor (CMOS) architecture is required, [4] which naturally does not draw power and can easily be implemented as a static circuit without the need for clocking. An example is the logic inverter, a fundamental building block of the digital circuit. Indeed, CMOS technology has fueled the revolution in micro- electronics thanks to its low power consumption, high-density integration of electronic circuits, and architectural simplicity, which inherently lends itself to straightforwardness in design. In this paper we present the proof of concept of a working low power electronic CMOS inverter circuit layered on a flexible and recyclable fiber-based paper substrate that simultaneously serves as the gate dielectric. [5] Indeed, paper is the lightest, most unbreakable, mechanically flexible, and cheapest known mate- rial that is fully recyclable. Although paper is hydrophobic and its hydrophibicity is circumvented when its surface is treated, for instance with poly(lactic acid) (PLA), we use hydrophobic paper having in its composition 2% fluorine in addition to Al 3 + , Na + , Cl - , S 6 + , P 5 + , Ca 2 + , Si 4 + and Mg + , which is typical of any fully recy- clable paper. Layered on the paper substrate are low temperature oxide semiconductor and conductive layers for the realization of CMOS circuits. This combination of low power circuitry, low temperature process, and recyclable substrate is a significant step toward green electronics, as demanded by our society towards a sustainable environment. This also opens up a myriad of new applications ranging from smart labels, sensors, and packaging to electronic displays printed on paper pages for use in newspapers, magazines, books, signs, and advertising billboards. Since the CMOS inverter circuit reported here is the fundamental building block for digital logic circuits, this development also creates the potential to have computers seamlessly layered onto paper. Traditionally, the CMOS architecture has required a high temperature process and the use of crystalline silicon (c-Si) substrates. [3] The high temperatures required for conventional CMOS technology means that it cannot be used to meet the growing demand for light, flexible [1,2,5,6] and cheap devices. This has resulted in a move towards newly emerging thin-film semiconductor materials such as organics, [6–8] hybrids, [9,10] and inorganic semiconductors like amorphous/nanocrystal- line silicon [11–13] and metal oxides. [14–21] Although these mate- rials cannot compete with c-Si CMOS in terms of the perform- ance required for high-speed computation and digital signal processing applications, they are an alternative for a range of newly emerging application areas such as disposable electronics and, in particular, for human–machine interfacing where the need for speed is intrinsically limited by biology. The CMOS architecture is based on connecting two transis- tors of opposite switching polarities (so-called n- and p-type tran- sistors), leading to complementary operation. The circuit uses both n-channel and p-channel field effect transistors (FETs) con- nected in series, with a common gate electrode. The input signal is applied simultaneously to the gate of both transistors having a common dielectric (paper) that also acts as the substrate. The output signal is taken from the node between serially connected drains of the two transistors. Previous attempts involving low temperature processes to implement CMOS circuits using thin- film organic or amorphous silicon FETs [6,11] have met with lim- ited success because of the poor n-type conduction in organics [7,8] and the poor p-type conduction in amorphous silicon. [11] Recently we have demonstrated n-channel oxide FETs [1,11] with mobilities at least one order of magnitude higher than organic p-channel or n-channel amorphous silicon FET, even when processed at low temperatures and implemented on paper. [22–24] Rodrigo Martins,* Arokia Nathan,* Raquel Barros, Luís Pereira, Pedro Barquinha, Nuno Correia, Ricardo Costa, Arman Ahnood, Isabel Ferreira, and Elvira Fortunato* Complementary Metal Oxide Semiconductor Technology With and On Paper