Performance evaluation of noise coupling on Germanium based TSV filled material for future IC integration technique Alluri Navaneetha f , A. Kishore Reddy c,1 , S. Aruna Deepthi g,1 , Ch. Usha Kumari a , Praveen Kumar Poola b , A. Arunkumar Gudivada e , Matta Durga Prakash d , Asisa Kumar Panigrahy a,⇑ a Department of Electronics and Communication Engineering, Gokaraju Rangaraju Institute of Engineering & Technology, Hyderabad 500090, Telangana, India b Department of Electronics and Communication Engineering, Koneru Lakshmaiah Education Foundation, Hyderabad, Telangana 500075, India c Department of Electronics and Communication Engineering, Geethanjali Institute of Science and Technology, Nellore, India d Department of Electronics and Communication Engineering, Velagapudi Ramakrishna Siddhartha Engineering College, Kanuru, Vijayawada-520 007, Andhra Pradesh, India e Department of Electronics and Communication Engineering, Aditya College of Engineering & Technology, Surampalem, East Godavari, Andhra Pradesh, India f Department of Electronics and Communication Engineering, Mahatma Gandhi Institute of Technology, Hyderabad 500075, India g Department of Electronics and Communication Engineering, Vasavi College of Engineering, Hyderabad 500031, India article info Article history: Received 16 July 2020 Received in revised form 24 July 2020 Accepted 26 July 2020 Available online xxxx Keywords: 3D IC CTE Conductance Core Materials c-Silicon c-Germanium poly-Germanium Cu Quantum-Well abstract 3D IC Integration shows the most emerging technology for future integration nodes which is now a most important trend for the semiconductor industries. Through-silicon-via (TSV) based integration is the prime technique to facilitate 3D IC integration without compromising the Moore’s law. It is likely to usher the IC industries a paradigm shift from planar integration as it provides major benefits like improvement of system performance, power and enables heterogeneous integration. In this paper, we report Germanium/poly-germanium as an substitute material for Silicon/poly-silicon due to its superior carrier mobility. Mobility of electrons and holes in c-Silicon is 1500 cm 2 /V-s and 450 cm 2 /V-s respectively, where as in c-Germanium, the respective values are 3900 cm 2 /V-s and 1900 cm 2 /V-s. Therefore, consid- ering these carrier mobility values we can envisage that poly germanium will be one of the ideal candi- date towards realizing a high speed TSV interconnect when compared with poly-silicon. Nevertheless, even though copper is used widely to fill TSVs, it is also bereft of proper thermal expansion match with Silicon/dielectric (SiO 2 ). The coefficient of thermal expansion (CTE) of Cu (17.5x 10 -6 /°C) is many times more than of silicon (2.5x 10 -6 /°C). Hence, there will be heavy mismatch between Cu filled TSV and Silicon/SiO 2 , and then it creates stress and strain between the interfaces. The CTE of germanium (5.8x 10–6/°C) is very close to Silicon, thus there CTE mismatch is very less, this fact is also an added advantage for Germanium to challenge copper as TSV material. Ó 2020 Elsevier Ltd. All rights reserved. Selection and peer-review under responsibility of the scientific committee of the International Confer- ence on Advances in Materials Research – 2019. 1. Introduction Semiconductor industries already reached to the extreme level of scaling due to physical limit of atomic level scaling to integrate millions of devices in a single IC. The main drawback is the planar integration (2D), which not only reduces the overall system perfor- mance but also raises the fabrication cost. Increase in functionality on a single IC makes the interconnection more stringent which in turn generates higher interconnect delay also limited the performance of IC. Also, it consumes more power which drastically reduces the overall system performance [1]. In order to keep an eye to extend the benefits of Moore’s law, Three-dimensional (3D) IC is one of the premiere integration technique for future IC technology nodes. 3D Integration technology stacks various IC’s vertically through electrical connections with the help of Through Silicon Vias (TSVs) and mechanically interconnected using bonding. Semi- conductor industries get helped due to the shift in paradigm in interconnects by enabling advancement of integration vertically. It not only helps the industry to enhance the system performance but also helps them to enable the heterogeneous integration [2–5]. The heterogeneous integration helps the semiconductor industries to speed up the fabrication process more than 2 times. The prime https://doi.org/10.1016/j.matpr.2020.07.631 2214-7853/Ó 2020 Elsevier Ltd. All rights reserved. Selection and peer-review under responsibility of the scientific committee of the International Conference on Advances in Materials Research – 2019. ⇑ Corresponding author. E-mail address: asisa@griet.ac.in (A. Kumar Panigrahy). 1 These authors contributed equally to this work. Materials Today: Proceedings xxx (xxxx) xxx Contents lists available at ScienceDirect Materials Today: Proceedings journal homepage: www.elsevier.com/locate/matpr Please cite this article as: A. Navaneetha, A. Kishore Reddy, S. Aruna Deepthi et al., Performance evaluation of noise coupling on Germanium based TSV filled material for future IC integration technique, Materials Today: Proceedings, https://doi.org/10.1016/j.matpr.2020.07.631