Novel Interleaver Design for Turbo Codes Shivani Pasricha 1 • Sanjay Sharma 1 Ó Springer Science+Business Media New York 2015 Abstract Interleaving is frequently used in digital communication and storage systems to improve the performance of forward error correcting codes. For turbo codes, an interleaver is an integral component and its proper design is crucial for good performance. Quadratic permutation polynomial (QPP) interleaver is a contention-free interleaver which is suitable for parallel turbo decoder implementation. This paper proposes a novel interleaver design, a variant of QPP interleaver, for turbo codes, which permutes a sequence of bits with the same statistical distribution as a conventional QPP interleaver and performs as well as or better than the conventional QPP. Proposed architecture has been simulated and synthesized using Xilinx and HDL Designer tools. Very large scale integration architecture for the proposed interleaver has been presented and analyzed for trade-off in terms of area, delay and power dissipation. Thermal power dissipation and device utilization have been computed for the proposed design using QuartusII (32-bit) tool. The paper also presents a comparison between the proposed variant of QPP interleaver and the conventional QPP interleaver. Keywords Turbo decoder  Interleaver  QPP  Permutation polynomial Abbreviations 3GPP Third generation partnership project LTE Long-term evolution QPP Quadratic permutation polynomial 1 Introduction Long term evolution (LTE) was developed by the third generation partnership project (3GPP) for the Wideband Code Division Multiple Access (WCDMA) based air interface [1]. The channel coding scheme for LTE is Turbo coding (Fig. 1)[2]. Turbo decoder is one & Shivani Pasricha shivani.pasricha@gmail.com 1 ECE Department, Thapar University, Patiala, India 123 Wireless Pers Commun DOI 10.1007/s11277-015-2954-5