866 IEEE TRANSACTIONS ON NUCLEAR SCIENCE, VOL. 59, NO. 4, AUGUST 2012 Neutron-Induced Failure in Silicon IGBTs, Silicon Super-Junction and SiC MOSFETs Alessio Griffoni, Member, IEEE, Jeroen van Duivenbode, Dimitri Linten, Member, IEEE, Eddy Simoen, Paolo Rech, Member, IEEE, Luigi Dilillo, Frédéric Wrobel, Member, IEEE, Patrick Verbist, and Guido Groeseneken, Fellow, IEEE Abstract—50 MeV and 80 MeV neutron-induced failure is inves- tigated for several types of power devices (super-junction, IGBT and SiC) from different vendors. A strong dependence on the de- vice type and orientation is observed. Index Terms—Insulated gate bipolar transistor (IGBT), neu- trons, power MOSFET, silicon carbide (SiC), single event burnout (SEB), single event gate rupture (SEGR), super-junction. I. INTRODUCTION H IGH-VOLTAGE devices and circuits are no longer re- stricted to high-end products, but are now moving from specialized applications in traction and aerospace into commer- cial applications such as switch-mode power supplies, motor control, displays and lighting. Today, several companies are de- veloping technologies which require handling 700 V supply voltage, e.g., for solar power grids and power drivers [1]–[5]. Silicon (Si) Super-Junction (SJ) technology is used to reduce (up to 5 ) the specific on-resistance and increase the break- down voltage of power MOSFETs [1], [6]. The basic concept of the SJ technology is the use of alternate highly doped p and n Manuscript received September 16, 2011; revised November 29, 2011 and December 14, 2011; accepted December 14, 2011. Date of publication February 03, 2012; date of current version August 14, 2012. This work was supported in part by the ANR project ANR-09-BLAN-0155-01 (HAMLET). A. Griffoni was with the Interuniversity MicroElectronics Centre (imec), B-3001 Leuven, Belgium, and is now with OSRAM, I-31100 Treviso, Italy (e-mail: a.griffoni@osram.com). J. van Duivenbode is with ASML, 5504 DR Veldhoven, Netherlands (e-mail: jeroen.van.duivenbode@asml.com). D. Linten and E. Simoen are with the Interuniversity MicroElectronics Centre (imec), B-3001 Leuven, Belgium (e-mail: dimitri.linten@imec.be; eddy.simoen@imec.be). P. Rech was with the Laboratoire d’Informatique, de Robotique et de Mi- croélectronique de Montpellier (LIRMM), Université de Montpellier II/CNRS, F-34095 Montpellier Cedex 5, France, and is now with the Universidade Fed- eral Do Rio Grande Do Sul (UFRGS), Porto Alegre, Brazil (e-mail: prech@inf. ufrgs.br). L. Dilillo is with the Laboratoire d’Informatique, de Robotique et de Mi- croélectronique de Montpellier (LIRMM), Université de Montpellier II/CNRS, F-34095 Montpellier Cedex 5, France (e-mail: luigi.dilillo@lirmm.fr). F. Wrobel is with the Institut d’Electronique du Sud (IES), Université Mont- pellier 2, UMR-CNRS 5214, F-34095 Montpellier Cedex 5, France (e-mail: frederic.wrobel@ies.univ-montp2.fr). P. Verbist was with the Interuniversity MicroElectronics Centre (imec), B-3001 Leuven, Belgium, and is now with Target Compiler Technologies, B-3001 Leuven, Belgium (e-mail: patrick@verbist.biz). G. Groeseneken is with the Interuniversity MicroElectronics Centre (imec), B-3001 Leuven, Belgium, and also with Department of Electrical Engineering, Katholieke Universiteit Leuven, B-3001 Leuven, Belgium (e-mail: guido.groe- seneken@imec.be). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TNS.2011.2180924 pillars in the drift region of the device with equal doping charge, so that the net charge in the drift region is virtually nil. These pillars act both to enhance the on-state performance by reducing the drift region resistance and improve the breakdown voltage as the electric field is more distributed inside the drift region of the device. Silicon Carbide (SiC) power MOSFETs can ex- hibit up to 10 lower specific on-resistance with respect to Si SJ devices, however, at the expense of a remarkably large cost. Si Insulated Gate Bipolar Transistor (IGBT) can theoretically have similar specific conductive losses and breakdown voltage compared to SiC devices despite the poor switching character- istics at very high current levels than Si SJ and SiC MOSFETs [1]. Neutrons-induced failure is one of the main failure mecha- nisms in power devices for terrestrial and avionics applications, and imposes a severe limit on the maximum DC blocking voltage. All the high-voltage power devices are affected by neutron-induced failure, including power MOSFETs, IGBTs, diodes, thyristors etc., [7]–[11]. The theoretical work on the cosmic-ray induced Single Event Burnout (SEB) and Single Event Gate Rupture (SEGR) on SJ devices, MOSFETs, diodes and IGBTs claim a potential higher robustness with respect to standard ones [12]–[14]. However, the few available heavy-ion experimental results show that SJ MOSFETs have a similar Single Event Burnout (SEB) sensi- tivity compared to the standard ones [15]. SiC power diodes ex- posed to heavy ions and high energy protons can exhibit anoma- lous charge collection and displacement damage inducing per- manent damage [16]–[18]. However, no experimental results exist on SiC power MOSFETs. Cosmic ray-induced failure af- fects IGBTs as well. Several techniques have been proposed to improve the Safe Operating Area (SOA), such as varying the n-drift thickness, using punch-though type trench or field-stop trench type IGBTs [9]–[11]. In this contribution, the impact of high energy neutron in- duced failure is investigated in Si SJ and SiC power MOSFETs and in IGBTs. For the first time to our knowledge, neutron ex- perimental results are shown for Si SJ and SiC power MOS- FETs. The accelerated tests results are compared to the real-time terrestrial data. The dependence of the device orientation with respect to the neutron beam and the failure type of the different devices is studied as well. II. DEVICES AND EXPERIMENTS Different commercially-available power devices (Si SJ, IGBT and SiC) from different vendors (IXYS Semiconductor, 0018-9499/$31.00 © 2012 IEEE