This content has been downloaded from IOPscience. Please scroll down to see the full text. Download details: IP Address: 80.82.77.83 This content was downloaded on 07/04/2017 at 05:21 Please note that terms and conditions apply. Tunnel FinFET CMOS inverter with very low short-circuit current for ultralow-power Internet of Things application View the table of contents for this issue, or go to the journal homepage for more 2017 Jpn. J. Appl. Phys. 56 04CD19 (http://iopscience.iop.org/1347-4065/56/4S/04CD19) Home Search Collections Journals About Contact us My IOPscience You may also be interested in: Tunnel Field-Effect Transistor with Epitaxially Grown Tunnel Junction Fabricated by Source/Drain-First and Tunnel-Junction-Last Processes Yukinori Morita, Takahiro Mori, Shinji Migita et al. Introduction of SiGe/Si heterojunction into novel multilayer tunnel FinFET Yukinori Morita, Koichi Fukuda, Takahiro Mori et al. Tunnel field-effect transistor with asymmetric gate dielectric and body thickness Dae Woong Kwon and Byung-Gook Park Effects of drain doping concentration on switching characteristics of tunnel field-effect transistor inverters Dae Woong Kwon, Jang Hyun Kim and Byung-Gook Park Reduction method of gate-to-drain capacitance by oxide spacer formation in tunnel field-effect transistor with elevated drain Dae Woong Kwon, Jang Hyun Kim, Euyhwan Park et al. Tunneling field-effect transistor with Si/SiGe material for high current drivability Hyun Woo Kim, Jang Hyun Kim, Sang Wan Kim et al. Digital-circuit analysis of short-gate tunnel FETs for low-voltage applications Jing Zhuge, Anne S Verhulst, William G Vandenberghe et al. Unexpected equivalent-oxide-thickness dependence of the subthreshold swing in tunnel field-effect transistors Takahiro Mori, Tetsuji Yasuda, Koichi Fukuda et al.