Lapping assisted dissolved wafer process of silicon for MEMS structures Shankar Dutta • Manoj Kumar • Surender Kumar • Md Imran • Isha Yadav • Anand Kumar • P. Kumar • Ramjay Pal Received: 29 December 2013 / Accepted: 24 February 2014 / Published online: 4 March 2014 Ó Springer Science+Business Media New York 2014 Abstract Dissolved wafer process (DWP) is being exten- sively used to fabricate complex micro-electro-mechanical system (MEMS) structures. Etching non-uniformity, increased surface roughness and duration of DWP is often influence MEMS devices yields. This paper presents a modified DWP involving lapping and polishing followed by chemical etching of silicon to release MEMS based structure. The lapping experi- ments are performed using silicon-carbide (SiC) and alumina (Al 2 O 3 ) abrasive. The polishing of the silicon samples is also done. The lapped and polished surfaces are compared with etched silicon surfaces in KOH and EDP solutions. The lapping- polishing process is found to be 2.5 (Al 2 O 3 )–3 (SiC) times faster than a standard etching processes based on KOH and EDP solutions. The average roughness (R a ) of the lapped–polished silicon surfaces are found to be 19.2 and 32.9 nm corresponding to SiC and Al 2 O 3 abrasive respectively. The R a value of EDP and KOH etched silicon surfaces are found to be 16.2 and 238.3 nm respectively. Based on the lapping—polishing results, SiC based lapping followed by polishing of silicon surface can be used as an alternate of etching of silicon during DWP. In this paper, a two- step DWP, involving lapping-polishing followed by EDP chemical etching of silicon, is used to fabricate suspended comb- type microaccelerometer structure. 1 Introduction In last few decades, we have seen evolutions of different fab- rication technologies for miniaturization of micro–electro– mechanical system (MEMS). Out of which bulk and surface micromachining techniques are the most prominent ones. Among them, bulk micromachining technique is being extensively used for shaping quite intricate three dimensional structures like diaphragm, cantilever, bridge, proof mass etc. in silicon substrates since the 1960s [1, 2]. In this process, precise and reproducible three dimensional micro-structures can be achieved via a constant etch rate and smooth silicon etch sur- faces [2–5]. In surface micromachining, the mechanical structures are fabricated by manipulating materials (structural and sacrificial) that are deposited on the surface of the silicon wafer [1, 6, 7]. The silicon wafer is primarily acts as a structural support for the surface micromachined devices. Although, the surface micromachining technique is a versatile technique, it limits the maximum possible thickness of the microstructure to that of deposited film (typically 5 lm or less). To combine the advantages of both surface and bulk mi- cromachining techniques, Professor Kensall Wise and his group had developed a new fabrication technique, popularly known as dissolved wafer process (DWP) [3]. This process involves boron doping (etch stop layer) and anisotropic etching of silicon wafer to realize MEMS structures. Once the silicon process is complete, the wafer is bonded onto a pat- terned borosilicate glass wafer, such as Pyrex 7,740, Boro- float33 etc. Thereafter, the silicon wafer (50–150 mm diameter) is dissolved away in wet chemical etchants leaving behind the boron-doped micromechanical structures on the glass substrate. Thickness of the fabricated MEMS structures is defined by the thickness (2–15 lm) of the heavily boron- doped regions [1, 8–11]. The main advantage of this process is that the MEMS structures can be realized at high densities and can have higher aspect ratios as compared to surface mi- cromachined parts. Using DWP, it is possible to concurrently fabricate high aspect ratio thick and/or thin microstructures on the same chip and at high densities. After the development of S. Dutta (&) Á M. Kumar Á S. Kumar Á M. Imran Á I. Yadav Á A. Kumar Á P. Kumar Á R. Pal Solid State Physics Laboratory, DRDO, Lucknow Road, Timarpur, Delhi 110054, India e-mail: shankardutta77@gmail.com 123 J Mater Sci: Mater Electron (2014) 25:1984–1990 DOI 10.1007/s10854-014-1833-2