~ P Pergamon Microelectron. Reliab., Vol. 36, No. 3, pp. 423 428, 1996 Copyright @ 1995 Elsevier Science Ltd Printed in Great Britain. All rights reserved 0026-2714/96 $15.00+.00 0026-2714(95) 00084-4 TECHNICAL NOTE RELIABILITY EVALUATION OF MULTISTAGE INTERCONNECTION NETWORKS WITH MULTI-STATE ELEMENTS C. R. TRIPATHY,* S. PATRA,* R. B. MISRA* and R. N. MAHAPATRA** * Department of Electrical Engineering, ** Department of Electronics and ECE, Indian Institute of Technology, Kharagpur 721302, India (Received for publication 31 March 1995) Abstract--This paper presents a graph-theoretic method for the reliability evaluation of multistage interconnection networks with multistate elements. For the purpose of analysis, the generalized cube (GC), a unique-path MIN and an extra-stage cube (ESC), a fault-tolerant variation of GC, are considered. An algorithm is presented to evaluate three reliability measures, i.e. terminal reliability (TR), broadcast reliability (BR) and network reliability (NR) of MINs for different reliability values of links and switches. The proposed method is found to be simple and computationally efficient compared to the existing techniques, and therefore can be applied for reliability evaluation of other large interconnection networks used in parallel computing systems. I. INTRODUCTION With the advent of very large-scale integration (VLSI) technology there has been considerable interest and increased efforts in developing more reliable super- systems. In the quest for higher and higher level performance, systems requiring throughputs of the order of billions of instructions per second are being planned. Such systems use various techniques to support restructurable data-paths between their resources. The interconnection network provides a means for inter-communication among processor processor and processor-memory in a parallel com- puting system. The problem of interconnection has been extensively studied in the past [-1]. In order to make the large-scale parallel processing systems more efficient, the recent trend nowadays is to employ multistage interconnection networks (MINs). MIN is a collection of switching elements (SEs) and links distributed over different stages in a defined configur- ation. Improved performance and increased reliability are two distinct advantages attributed to intercon- nection topologies. Padmanabhan and Lawrie [-2] proposed several MINs and their performance analysis. Recently, Lee et al. [3] proposed some analytic models for performance evaluation of a class of multi-path packet switching networks that are intrinsically fault-tolerant. Some researchers have addressed the reliability issues pertaining to interconnection networks under the assumption of statistical independence of failures [4-6]. Blake and Trivedi [7] discussed the reliability analysis of interconnection networks using two-level hierarchical composition. Among large numbers of networks generalized cube (GC) constitutes an important class of topologically equivalent MIN which can operate in the SIMD, multiple SIMD, MIMD and partitionable SIMD/MIMD modes of parallelism. It includes the Omega network, indirect binary n-cube, STARAN and sw-banyan networks. The multistage cube and its fault-tolerant topology, the extra-stage cube (ESC) networks, have been proposed in Ref. [8] and implemented in many practical supersystems such as: the Ballistic Missile Defense Agency distributed processing test bed, PASM [9]. Because of the increasing system complexity, assuring high reliability in the above networks is a significant task. This paper presents a graph-theoretic method for evaluating reliability of multistage interconnection networks with multi-state elements. Three important reliability measures: terminal reliability (TR), broadcast reliability (BR), network reliability (NR) are defined. The MIN is represented by a system graph. An algorithm is developed to enumerate all paths between the source nodes to sink nodes of the graph. Expressions for TR, BR, NR for a generalized cube and an extra-stage cube are generated from the paths. While computing reliabilities the failure probabilities asso- ciated with the links connecting source-processors to the input-stage SEs and the links between the output-stage SEs to the destination-processors have been taken into account. The method is observed to be simple, computationally efficient and overcomes the limitations of the existing methods. 423