IEICE TRANS. ELECTRON., VOL.E94–C, NO.5 MAY 2011 807 PAPER Special Section on Fundamentals and Applications of Advanced Semiconductor Devices A V-Band Common-Source Low Noise Amplifier in a 0.13 μm RF CMOS Technology and the Eect of Dummy Fills Sungjin KIM , Hyunchul KIM , Dong-Hyun KIM , Nonmembers, Sanggeun JEON , Member, Yeocho YOON †† , Nonmember, and Jae-Sung RIEH a) , Member SUMMARY In this work, a V-band low noise amplifier (LNA) is de- veloped in a commercial 0.13 μm RFCMOS technology. Common-source (CS) topology, known to show a better noise performance than the cascode topology, was adopted and 4-stage was employed to achieve a sucient gain at the target frequency near the cutofrequency f T . The measured gain was 18.6 dB with V DD = 1.2 V and increased up to 20.2 dB with V DD = 1.8 V at 66 GHz. The measured NF showed a minimum value of 7.0 dB at 62 GHz. DC power consumption was 24 mW with V DD = 1.2 V. The size of the fabricated circuit is as compact as 0.45 mm × 0.69 mm. This work was further extended to investigate the eect of dummy fills on LNA performance. An identical LNA, except for the dummy fills formed very close to (and under) the metal lines of spiral inductors and intercon- nects, was also fabricated and compared with the standard LNA. A peak gain degradation of 3.6 dB and average NF degradation of 1.3 dB were ob- served, which can be ascribed to the increased mismatch and line loss due to the dummy fills. key words: mm-wave(MMW), RFCMOS, low noise amplifier 1. Introduction The mm-wave band, a spectrum range traditionally consid- ered mostly for military applications, has recently found fertile application cases in commercial sectors. Especially, the availability of the unlicensed band around 60 GHz has attracted recent growing attention as it enables very high data rate communication systems despite its high attenua- tion level in the earth atmosphere. Such conditions make the band highly suitable for broadband wireless personal area network (WPAN) [1]. Although initially considered very challenging, the implementation of mm-wave circuits with CMOS technology has now become a mainstream ow- ing to the aggressive scaling of CMOS technology and con- sequent rapid enhancement in the device operation speed. Additional favorable features of CMOS technologies such as high reliability and low cost make its commercial appli- cations more attractive. The low noise amplifier (LNA) is a key circuit block in front-end receivers as its noise figure determines the overall noise level of the entire receiver. Figure 1 shows the operat- ing frequency trend of the recently published high frequency LNAs based on CMOS technology, grouped by the technol- ogy node they employed. It is clear from the plot that the circuits operating near 60 GHz or higher are currently dom- Manuscript received September 1, 2010. Manuscript revised January 7, 2011. The authors are with Korea University, Seoul 136-701, Korea. †† The author is with Dongbu Hitek, Chungbuk, Korea. a) E-mail: jsrieh@korea.ac.kr DOI: 10.1587/transele.E94.C.807 Fig. 1 Operating frequency trend of LNA based on CMOS technology. inated by sub-100 nm technology nodes. Commercial ap- plications, however, are largely driven by cost factors and thus prefer implementation with low cost relaxed technol- ogy node if available. Hence, in this work, an eort was made to develop an LNA operating near 60 GHz based on a low cost 0.13 μm RFCMOS technology. 2. Circuit Design The schematic of the 4-stage LNA proposed in this work is shown in Fig. 2, which adopts the common-source (CS) topology. The majority of LNAs recently reported for mm-wave applications have adopted the cascode topology, largely because of its higher gain along with the better re- verse isolation property compared to the CS topology [2]– [4]. However, the CS topology tends to show a better noise figure than the cascode in general, since CG stage in the cascode topology shows a large noise figure and the gain of CS stage in the cascode is typically not sucient to sup- press this noise. Furthermore, it enables a low supply volt- age V DD , resulting in a low DC power consumption of the circuit. Hence, the CS topology was adopted in this work in favor of low noise and low DC power consumption. To compensate for the relatively low gain per stage of the CS approach, 4 gain stages were cascaded to achieve a sucient level of power gain. One of the challenges in designing mm-wave circuits is the limited accuracy of the device models oered by the foundries at high frequency range. The problem is poten- tially more critical for active devices, since there is no ad- Copyright c 2011 The Institute of Electronics, Information and Communication Engineers