A Decomposition-Based Symbolic Analysis Method for Analog Synthesis from Behavioral Specifications Alex Doboli and Ranga Vemuri Digital Design Environments Laboratory, Department ofECECS University of Cincinnati, Cincinnati, OH 45221-0030 Email: { adoboli,ranga } ececs.uc.edu Abstract This paper discusscs a technique for symbolic analysis of largc analog systems. The method exploits the hierarchical structure and uniformity of a system for producing compact symbolie expressions. The technique is based on decom- posing a system through the method of tcaring [5] as opposed to traditional symbolic methods that llse nodal analysis. After producing the symbolic model ora system, a set ofredLlction rules is applied to the model. RedLlctions attempt 10 dccrease the number of arithmetic operations perronned for numetically evalu- ating the symbolic model. The discLlssed technique is useful for synthesis, inside an exploration-Ioop, as it avoids repeatedly computing the symbolic models. 1. INTRODUCTION Symbolic analysis is the task of automatically deducing relationships be- tween overall parameters of a system and parameters ofthe composing elements of the system [6] [3]. For example, a symbolic expression can describe the transfer-function of a filter in terms of parameters of its building elements, i.e. op amps, resistors, and capacitors. Analysis techniques include determinant- based methods and signal-flow graph methods [6]. Determinant-based methods use Cramer's rule for solving the set of linear equations implied by symbolic analysis [3]. Signal-flow graph methods represent a set oflinear equations as a weighted graph, and use Mason's rule for solving the equations [6]. Symbolic analysis has a wide range of applications i.e. frequency response calculation, sensitivity analysis, hardware synthesis etc. This paper proposes on a new symbolic analysis technique for analog synthesis. The main challenge for symbolic analysis is the exponential growth of the produced symbolic expressions (10 11 terms for an op amp [4]). Current research considers two ways ofhandling this aspect: approximation and hierar- The original version of this chapter was revised: The copyright line was incorrect. This has been corrected. The Erratum to this chapter is available at DOI: © IFIP International Federation for Information Processing 2000 L. M. Silveira et al. (eds.), VLSI: Systems on a Chip 10.1007/978-0-387-35498-9_57