Journal Pre-proof Low power active load and IMOS varactor based VCO designs using differential delay stages in 0.18฀μm technology Vivek Jangra, Manoj Kumar PII: S0026-2692(19)31045-6 DOI: https://doi.org/10.1016/j.mejo.2020.104728 Reference: MEJ 104728 To appear in: Microelectronics Journal Received Date: 15 December 2019 Revised Date: 31 January 2020 Accepted Date: 18 February 2020 Please cite this article as: V. Jangra, M. Kumar, Low power active load and IMOS varactor based VCO designs using differential delay stages in 0.18฀μm technology, Microelectronics Journal (2020), doi: https://doi.org/10.1016/j.mejo.2020.104728. This is a PDF file of an article that has undergone enhancements after acceptance, such as the addition of a cover page and metadata, and formatting for readability, but it is not yet the definitive version of record. This version will undergo additional copyediting, typesetting and review before it is published in its final form, but we are providing this version to give early visibility of the article. Please note that, during the production process, errors may be discovered which could affect the content, and all legal disclaimers that apply to the journal pertain. © 2020 Published by Elsevier Ltd.