A Qualitative Study on Optimized MOSFET Doping Profiles M. Stockinger, R. Strasser, R. Plasun, A. Wild*, and S. Selberherr Institute for Microelectronics, TU Vienna Gusshausstr. 27-29, A-1040 Vienna, Austria •Motorola Tempe, AZ 85284, USA Abstract We present the two-dimensional optimization of the acceptor doping profile of a 0.25 /im MOSFET which improves the drive current by 48% compared to a uniformly doped device delivering the same drain-source leakage current. Various values for the supply voltage and the allowed leakage current are used to qualitatively investigate their influence on the optimal profile. 1. Introduction High performance ULSI technology requires devices with optimized characteristics. In the past various device structures have been reported for MOSFETs with different aims, e.g. improving short-channel effects, drive current, leakage current, gate delay, etc. Low-power applications became more and more important because of the growing portable electronics market. Supply voltage will continuously be reduced for future device generations in order to reduce the power consumption and to enable single- battery operation. Very low off-state currents are needed to meet the standby power requirements. Optimizations performed by hand or manually controlled simulations are no longer suitable for complex performance goals. Therefore, a fast self-contained device op- timization process is required. Parameters like device structure, supply voltage, or allowed drain-source leakage current have a strong influence on the optimization re- sults. General dependencies on these parameters can be found to give a guideline for the design of optimal doping profiles. 2. Two-Dimensional Optimization We performed an acceptor doping profile optimization of an n-MOSFET with 0.25 ^m gate length, 1 fim gate width, 5 nm gate-oxide thickness, 83 nm S/D-spacer length, 50 nm S/D-junction depth, 10 20 cm -3 S/D surface donor doping, 10 12 cm -3 substrate donor doping (Fig. 1), and 10 17 cm -3 substrate acceptor doping. The goal is to achieve maximum drive current I on for a supply voltage V dd = 1.5 V while at the same time keeping the drain-source leakage current I 0 /j below 1 pA. For optimization purposes