Uni-axial mechanical stress effect on Trench Punch through IGBT under short-circuit operation Y. Belmehdi * , S. Azzopardi, A. Benmansour, J.-Y. Delétage, E. Woirgard IMS Laboratory, 351 Cours de la Libération 33405, Talence Cedex, France article info Article history: Received 23 June 2009 Available online 26 July 2009 abstract In the proposed study, the investigation of the internal physical behaviour of the Trench Punch through Insulated Gate Bipolar Transistor under short-circuit with an external uni-axial mechanical stress have been fully carried out. A 2D physically-based simulation approach has been proposed. The deformation potential theory and the piezoresistive effect were adopted for the stress dependence modeling of the band edge potential and the carrier mobility, respectively. Simulation results show that the saturation current during short-circuit operation is strongly affected by external mechanical stress depending on its level, direction and nature (compressive or tensile), mainly due to the carrier mobility change. Crown Copyright Ó 2009 Published by Elsevier Ltd. All rights reserved. 1. Introduction High output power density has to be achieved for the future power module, inducing reduction of its thermal resistance. Re- cently, a novel module structure in which power devices are di- rectly soldered between two copper plates was proposed [1,2] improving the heat dissipation. However, thermal stress on the power die becomes larger than that on the conventional module. Previous researches have demonstrated that mechanical stress can affect carrier mobility, band gap as well as junction leakage [3,4]. Main results show that the mechanical stress dependence of breakdown voltage and of leakage current variations was negli- gible whereas mobility dependence with mechanical stress was the most significant effect. On-state characteristics is affected by uni-axial mechanical stress, compressive stress in order of 400 MPa implies decreasing of 5% on the on-state voltage, V on . In the proposed study, a 2D physically-based simulation ap- proach for short-circuit configurations has been carried out to ana- lyze the device behaviour in detail. 2. Device structure The Trench IGBT investigated is controlled by a trench gate and it is a punch through type (Fig. 1). So, the PNP emitter and the base are separated by a heavily doped N+ layer. Lifetime is controlled by ion implantation. This de- vice is designed for a rated current of 150 A. The structure width is 2.2 lm. Previous studies have been performed on static and dynamics characteristics to fit the model [5,6]. 3. 2D physically based model The physical simulation is performed with GENESISe SENTAU- RUS TCAD software [7]. To carry out electrothermal simulations (including device self-heating) combined with mechanical simula- tions, thermal boundaries and mechanical models need to be spec- ified. Thermal boundaries are specified in the same way as electrical boundaries. Present simulations are carried out using thermal boundaries at the top and bottom of the device, lateral parts are in adiabatic configuration. Two mechanical models are adopted in our simulations: deformation potential theory [8] and piezoresistive effect [9]. Positive stress is equivalent to a tensile stress while negative stress is equivalent to a compressive stress. The mechanical properties of silicon depend on its crystallo- graphic orientation. For our simulation, it comes down to the study of silicon in the (0 0 1) crystal orientation. An uni-axial mechanical stress along x-axis (Fig. 2) has been ap- plied on the device. Then current waveforms of the Trench IGBT under short-circuit configurations have been recorded. 4. Short-circuit simulated circuit This section aims at studying the influence of an uni-axial mechanical stress on the short-circuit behaviour of our trench gate PT IGBT. Fig. 3 illustrates the test circuit used for the simulations of the short-circuit. In order to fit the measured short-circuit curves with 2D simulation results, it is necessary to consider parasitic electrical elements attached to the physical structure. These ele- ments are associated to the packaging and the measurement test set: parasitic inductances (l A , l K ) and parasitic collector resistance r A . A ballast resistance r K is also added to adjust the short-circuit current level. This resistor is needed due to the 2D simulation 0026-2714/$ - see front matter Crown Copyright Ó 2009 Published by Elsevier Ltd. All rights reserved. doi:10.1016/j.microrel.2009.06.037 * Corresponding author. E-mail address: yassine.belmehdi@ims-bordeaux.fr (Y. Belmehdi). Microelectronics Reliability 49 (2009) 1398–1403 Contents lists available at ScienceDirect Microelectronics Reliability journal homepage: www.elsevier.com/locate/microrel