http://journals.cambridge.org Downloaded: 26 Apr 2014 IP address: 140.113.38.11 Microstructural evolution during electromigration in eutectic SnAg solder bumps Y.H. Chen, T.L. Shao, P.C. Liu, and Chih Chen a) National Chiao Tung University, Department of Material Science & Engineering, Hsin-chu 30050, Taiwan T. Chou Macronix International Corporation, Ltd., Hsin-chu, 30078, Taiwan (Received 11 January 2005; accepted 12 May 2005) Microstructural changes induced by electromigration were studied in eutectic SnAg solder bumps jointed to under-bump metallization (UBM) of Ti/Cr–Cu/Cu and pad metallization of Cu/Ni/Au. Intermetallic compounds (IMCs) and phase transformations were observed during a current stress of 1 × 10 4 A/cm 2 at 150 °C. On the cathode/ substrate side, some of the (Cu y ,Ni 1-y ) 6 Sn 5 transformed into (Ni x ,Cu 1-x ) 3 Sn 4 due to depletion of Cu atoms caused by the electron flow. It is found that both the cathode/ chip and anode/chip ends could be failure sites. On the cathode/chip side, the UBM dissolved after current stressing for 22 h, and failure may occur due to depletion of solder. On the anode/chip side, a large amount of (Cu y ,Ni 1-y ) 6 Sn 5 or (Ni x ,Cu 1-x ) 3 Sn 4 IMCs grew at the low-current-density area due to the migration of Ni and Cu atoms from the substrate side, which may be responsible for the electromigration failure at this end. I. INTRODUCTION Flip-chip technology has become one of the most im- portant packaging methods for integrated circuit (IC) packaging. One of its advantages is that a large number of tiny solder bumps can be fabricated into an area array on a chip as input/output (I/O) interconnections. To meet increasing performance requirements, the I/O number keeps increasing. Thus, the size of the bumps shrinks continuously, causing rapid increases in the current den- sity passing through the bumps. Therefore, electromigra- tion (EM) has become an important reliability issue for flip-chip packages. 1,2 Furthermore, with increasing environmental concerns, the microelectronics industry is switching to lead-free solder alternatives. One of the most promising candidates is SnAg3.5 solder, because the manufacture of SnAg3.5 solder bumps on a wafer by electrical plating or printing technology is now commercially available. The intercon- nections are established when the solder reacts with the under-bump metallization (UBM) on the chip side and the pad metallization on the substrate side to form inter- metallic compounds (IMCs). However, Pb-free solders are known to have a high reaction rate with Cu or Ni UBM due to their high Sn content of Sn. 3 Because the reliability and strength of the solder joint are highly re- lated to IMC formation at the joint, metallurgical reac- tions between solder and metallization layers become an important reliability issue, because the volume ratio of the IMCs to the solder increases as the dimension of the solder bumps decreases. Therefore, the influence of the IMCs on the solder joint reliability has become more critical than before. 3 Previous studies on electromigration of flip-chip sol- der bumps focused mainly on eutectic SnPb solders. 4–10 Mean time-to-failure was measured for the eutectic SnPb solder bumps. 4 A current-crowding effect on the cathode/ chip side was proposed to be responsible for the failure at the cathode/chip side of the SnPb bumps. 7–9 Recently, research has focused on electromigration in Pb-free sol- der bumps. 11–13 For SnAg solder bumps, it was reported that electromigration failure may occur on the anode/chip side. 14 Chen et al. reported that current stress could en- hance growth or dissolution of the IMCs at the interfaces of Ni and Sn. 15 However, concerning SnAg3.5 flip-chip solder bumps on Ti/Cr–Cu/Cu UBM and Ni(P)/Au pads, little research has been made on the microstructure evo- lution due to electromigration. This paper investigates microstructural evolution during current stress and its influence on the failure mechanism of electromigration. II. EXPERIMENTAL The flip-chip packages of SnAg3.5 solder bumps were prepared as follows: The chip size was 9.5 mm × 6.0 mm a) Address correspondence to this author. e-mail: chih@cc.nctu.edu.tw DOI: 10.1557/JMR.2005.0291 J. Mater. Res., Vol. 20, No. 9, Sep 2005 © 2005 Materials Research Society 2432