IEEE TRANSACTIONS ON POWER ELECTRONICS, VOL. 27, NO. 5,MAY 2012 2471 Analysis of Inductorless Zero-Voltage-Switching Piezoelectric Transformer-Based Converters Edward L. Horsley, Alfredo V. Carazo, Nam Nguyen-Quang, Martin P. Foster, and David A. Stone Abstract—The inductorless piezoelectric transformer (PT)- based resonant converter topology allows all the components be- tween the half-bridge inverter and rectifier in a conventional LCC converter to be replaced with a single ceramic component. This of- fers potential savings in cost, size, and mass. However, zero-voltage switching (ZVS) becomes more difficult to achieve because the MOSFET output capacitances are augmented by the PT input ca- pacitance. This paper presents an analytical model for the ZVS condition in inductorless PT-based converters. Unlike previously reported models, the proposed model is shown to offer a level of accuracy comparable to a SPICE simulation and to correlate well with experimental results.Using a normalization scheme and numerical optimization techniques, the criteria for achieving in- ductorless ZVS are found in terms of the equivalent circuit compo- nents. Both ac-output and dc-output variants are considered, and design charts for ensuring ZVS in five different topologies are pre- sented. The results and design charts are applicable to any type of PT that can be represented by the standard PT equivalent circuit. Index Terms—Inductorless, piezoelectric transformer (PT), resonant power conversion, zero-voltage switching (ZVS). I. INTRODUCTION T HERE has been much interest over the past two decades in the development of piezoelectric transformers (PTs) to replace many of the reactive components in certain switch mode power supply topologies [1], [2]. Since the reactive components in a power electronic circuit are usually the largest and most expensive, the use of a PT can yield savings in cost, size, and mass. The topologies that are most suited for use with PTs are push-pull, half-bridge, and class-E [1]. The push-pull and class- E topologies require one or more additional inductors to be added to the input side of the PT [1], [3], [4]. While the half-bridge topology is also commonly used with an induc- tor in series or parallel with the PT input, it is possible to re- Manuscript received August 4, 2010; revised April 10, 2011; accepted September 6, 2011. Date of current version February 27, 2012. This paper was presented in part at the IEEE Power Electronics and Drive Systems Con- ference, Taiwan, November 2–5. Recommended for publication by Associate Editor S. Y. (R.) Hui. E. L. Horsley, M. P. Foster, and D. A. Stone are with the Department of Electronic and Electrical Engineering, University of Sheffield, Sheffield S1 3JD, U.K. (e-mail: ehorsley@theiet.org; m.p.foster@sheffield.ac.uk; d.a.stone@sheffield.ac.uk). A. V. Carazo is with Micromechatronics, Inc., State College, PA 16803 USA (e-mail: avc@mmech.com). N. Nguyen-Quang was with the University of Sheffield, Sheffield S1 3JD, U.K. He is now with Ho Chi Minh City University of Technology, Vietnam (e-mail: nqnam@hcmut.edu.vn). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TPEL.2011.2169431 Fig. 1. Inductorless PT-based ac-output converter. move this inductor completely if the PT is designed appropri- ately [5]–[10]. The half-bridge topology without an additional inductor at the PT input is often referred to as the “inductorless” configuration. The lumped equivalent circuit model for a PT is topologically similar to a conventional LCC series–parallel converter, but with an additional capacitance across the PT input. When used in the inductorless topology, such as the ac-output variant shown in Fig. 1, the output capacitance of the MOSFETs is augmented by the input capacitance of the PT, C in . Since the former is of the order of tens to hundreds of picofarad, whereas the latter is often several nanofarad, the amount of charge that must be delivered by the tank current i L 1 during the dead-time in order for zero-voltage switching (ZVS) to be achieved is much greater than in a conventional discrete converter. A much larger dead- time must also be used in order to provide sufficient time for this charge to be delivered. Therefore, inductorless converters will typically be operated further above resonance than their con- ventional counterparts because the maximum dead-time (the time between one MOSFET being turned OFF and the other MOSFET being turned ON) that can be used is dictated by the time between the low-side MOSFET (i.e., S 2 in Fig. 1) turn- ing OFF and the tank current crossing zero, which in turn is partly dictated by the phase angle at which the tank is oper- ated. Since the total capacitance across the half-bridge is con- siderable, the voltage across the MOSFETs is heavily snubbed during turn-off. Therefore, ZVS turn-off is easily obtained, and the primary concern throughout this paper is the need for ZVS turn-on. If the PT input capacitance is too large, the tank current will not be able to supply sufficient charge during the dead-time and ZVS will not be achieved. Since the total capacitance across the half-bridge is much larger compared to a discrete converter, the power dissipation that occurs in the MOSFET switches if ZVS is not achieved is also much greater. While reducing the PT input capacitance will allow induc- torless ZVS to be achieved more readily, it will also decrease PT power density because the size of the input section must be 0885-8993/$26.00 © 2011 IEEE