8 An MDE Approach for Rapid Prototyping and Implementation of Dynamic Reconfigurable Systems GILBERTO OCHOA-RUIZ, Lab-STICC S ´ EBASTIEN GUILLET, LIARA Laboratory FLORENT DE LAMOTTE, Lab-STICC ERIC RUTTEN, INRIA Rhˆ one-Alpes EL-BAY BOURENNANE, LE2I JEAN-PHILIPPE DIGUET, Lab-STICC GUY GOGNIAT, Lab-STICC This article presents a co-design methodology based on RecoMARTE, an extension to the well-known UML MARTE profile, which is used for the specification and automatic generation of Dynamic and Partially Reconfigurable Systems-on-Chip (DRSoC). This endeavor is part of a larger framework in which Model- Driven Engineering (MDE) techniques are extensively used for modeling and via model transformations, generating executable models, which are exploited by implementation tools to create reconfigurable systems. More specifically, the methodological aspects presented in this article are concerned with expediting the conception and implementation of the hardware platform and the integration of correct by construction reconfiguration controller. This article builds upon previous research by integrating previously separated endeavors to obtain a complete PR system generation chain, which aims at shielding the designer of many of the burdensome technological and tool-specific requirements. The methodology permits for the verification of the platform description at different stages in the development process (i.e., HDL for simulation, static FPGA implementation, controller simulation and verification). Furthermore, automation capabilities embedded in the flow enable the generation of the platform description and the integration of the reconfiguration controller executive seamlessly. In order to demonstrate the benefits of the proposed approach, we present a case study in which we target the creation of an image-processing application to be deployed onto an FPGA board. We present the required modeling strategies and we discuss how the generation chains are integrated with the back-end Xilinx tools (the most mature version of PR technology) to produce the necessary executable artifacts: VHDL for the platform description and a C description of the reconfiguration controller to be executed by an embedded processor. Categories and Subject Descriptors: D.2.2 [Software Engineering]: Design Tools and Techniques— Computer-aided software engineering (CASE) General Terms: Design, Algorithms Additional Key Words and Phrases: Model driven engineering, UML MARTE, partial reconfiguration, FPGA, discrete controller synthesis, IP-XACT, IP reuse, CAD This work was supported by the ANR research project FAMOUS. This project has been funded by the French National Research Agency under the ANR-009-SEGI-003 grant. Authors’ addresses: G. Ochoa-Ruiz, F. de Lamotte, J.-P. Diguet, and G. Gogniat, Lab-STICC, Lorient, France; email: {gilberto.ochoa-ruiz; florent.lamotte; jean-philippe.diguet; guy.gogniat}@univ-ubs.fr; S. Guillet, LIARA Laboratory, Universit´ e du Qu´ ebec, Qu´ ebec, Canada; email: sebastien.guilletl@uqac.ca; E. Rutten, INRIA Rhˆ one-Alpes, Grenoble, France; email: eric.rutten@inria.fr; E.-B. Bourennane, LE21, Dijon, France; email: ebourenn@u-bourgogne.fr. Correspondence email: gilberto.ochoa@univ-ubs.fr. Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that copies show this notice on the first page or initial screen of a display along with the full citation. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, to republish, to post on servers, to redistribute to lists, or to use any component of this work in other works requires prior specific permission and/or a fee. Request permissions from permissions@acm.org. 2015 Copyright held by the Owner/Author. Publication rights licensed to ACM. 1084-4309/2015/11-ART8 $15.00 DOI: http://dx.doi.org/10.1145/2800784 ACM Transactions on Design Automation of Electronic Systems, Vol. 21, No. 1, Article 8, Pub. date: November 2015.