FRANKLIN ET AL . VOL. XXX NO. XX 000000 XXXX www.acsnano.org A C XXXX American Chemical Society Dening and Overcoming the Contact Resistance Challenge in Scaled Carbon Nanotube Transistors Aaron D. Franklin, †,‡, * Damon B. Farmer, and Wilfried Haensch †, * IBM T. J. Watson Research Center, Yorktown Heights, New York 10598, United States and Departments of Electrical & Computer Engineering and Chemistry, Duke University, Durham, North Carolina 27708, United States S caling down the size of silicon metal- oxideÀsemiconductor eld-eect trans- istors (MOSFETs) has been carried out for decades in order to increase the density of devices on a chip and provide better compu- tational performance. In the past 10 years, the inability to correspondingly reduce the operating voltage (V DD ) for MOSFETs as they shrink has led to major bottlenecks in device performance for recent transistor techno- logies. 1À4 To deliver the needed performance metrics at the device densities of the sub- 10 nm technology nodes (ca. 2020 and beyond), a transistor must be able to operate at V DD e 0.5 V. The inability to reduce V DD in Si-based devices has led to an intensifying search for a new transistor channel material or device; 5À7 one of the foremost options is single-walled carbon nanotubes (CNTs). CNTs oer the ideal 1D channel for tran- sistors, as they are intrinsically 1D (quantum connement is part of their natural physical structure), extremely thin (1 nm diameter), and semiconducting (band-gap range of approximately 500À800 meV, inversely de- pendent on diameter) and exhibit ballistic transport at room temperature. 8,9 Through the years, there have been many demon- strations of CNT eld-eect transistors (CNTFETs) with superb performance, includ- ing complementary devices, 10,11 gate-all- around devices, 12À14 and devices with channel lengths scaled to 9 nm. 15,16 In addition to the 9 nm channel length CNTFET displaying promising performance at |V DD | = 0.5 V, 15 there have also been circuit demonstrations of complementary CNT-dri- ven logic gates operating at V DD < 0.5 V. 10,17 There have also been advancements in the purication of semiconducting CNTs and their precise positioning in parallel arrays, 18À23 showing promise for achieving the target purity and placement density by the 2020 time frame. 24 While this device- and material-related progress is impressive and motivating, there remains confusion regarding what will determine the perfor- mance in a technologically compatible CNTFET. Carrier transport through a CNT channel is ballistic for a channel length (L ch ) below approximately 40 nm, as demonstrated by * Address correspondence to aaron.franklin@duke.edu; whaensch@us.ibm.com. Received for review May 5, 2014 and accepted July 2, 2014. Published online 10.1021/nn5024363 ABSTRACT Carbon nanotubes (CNTs) continue to show strong promise as the channel material for an aggressively scaled, high-performance transistor technology. However, there has been concern regarding the contact resistance (R c ) in CNT eld- eect transistors (CNTFETs) limiting the ultimate performance, especially at scaled contact lengths. In this work, the contact resistance in CNTFETs is dened in the context of a high-performance scaled transistor, including how the demonstrated R c relates to technology targets. The impact of dierent source/drain contact metals (Pd, Pt, Au, Rh, Ni, and Ti) on the scaling of R c versus contact length is presented. It is discovered that the most optimal contact metal at long contact lengths (Pd) is not necessarily the best for scaled devices, where a newly explored scaled metal contact, Rh, yields the best scaling trend. When extrapolated for a sub-10 nm transistor technology, these results show that the R c in scaled CNTFETs is within a factor of 2 of the technology target with much potential for improvement through enhanced understanding and engineering of transport at the metalÀCNT interface. KEYWORDS: carbon nanotube . eld-eect transistor . contact . contact resistance . transistor scaling . CNTFET ARTICLE