© 2014 WILEY-VCH Verlag GmbH & Co. KGaA, Weinheim 150 wileyonlinelibrary.com COMMUNICATION High-Gain Subnanowatt Power Consumption Hybrid Complementary Logic Inverter with WSe 2 Nanosheet and ZnO Nanowire Transistors on Glass Seyed Hossein Hosseini Shokouh, Atiye Pezeshki, Syed Raza Ali Raza, Hee Sung Lee, Sung-Wook Min, Pyo Jin Jeon, Jae Min Shin, and Seongil Im* S. H. H. Shokouh, A. Pezeshki, S. R. A. Raza, H. S. Lee, S.-W. Min, P. J. Jeon, J. M. Shin, Prof. S. Im Institute of Physics and Applied Physics Yonsei University 50 Yonsei-ro, Seodaemun-gu, Seoul 120–749, Korea E-mail: semicon@yonsei.ac.kr DOI: 10.1002/adma.201403992 the source and drain (or vice versa) of ZnO nanowire FET, which would be connected in series to a bottom gate WSe 2 nanosheet FET. Our nanowire–nanosheet h-CMOS inverter demonstrated a maximum voltage gain over 60, maximum power consumption of subnano-to-a few nanowatts, and at least 1 kHz switching speed on glass. We thus regard that this type of hybrid approach is as simple as possible but shows unprec- edented state of the art CMOS performances in low-dimension semiconductor devices, merging the advantages of 1D and 2D semiconductors toward future nanoelectronics. Figure 1a displays the optical microscopy (OM) image of our WSe 2 nanosheet and ZnO nanowire FETs, which are to be con- nected in series, as magnified from their location on a glass substrate. Figure 1b shows the same image but from scanning electron microscopy (SEM) observation. The thickness of WSe 2 nanosheet was ≈13 nm as scanned in atomic force microscope (see the inset of Figure 1b). Figure 1c shows the 3D schematic view of our h-CMOS inverter with those two FETs. Here, it is noted that one electrode is Ni in contact with the ZnO nanowire for Schottky contact. This means that the threshold voltage and channel current of our ZnO nanowire FET can be controlled by Schottky effects. [33,34] Figure 1d thus shows two types of h-CMOS circuit with ZnO FET that is under forward or reverse biased depending on the Ni contact location. If Ni contacting the ZnO nanowire is near WSe 2 (left circuit), Ni/ ZnO Schottky contact is under a forward-biased state because supply voltage ( V DD ) is always positive (+) in the circuit. If Ni is near ground (right circuit), Ni/ZnO Schottky contact is then under a reverse biased. Therefore, the channel of ZnO nanowire FET is under a reverse-biased state with Ni source and Ti/Au drain. In the present work, ZnO nanowire FET on glass was ini- tially fabricated with 30-nm-thick atomic layer deposited (ALD) Al 2 O 3 dielectric and Au top gate, prior to transferring p-channel WSe 2 nanoflake FET by direct imprinting near the ZnO nanowire FET (about which any details are found in Sup- porting Information Figure S1). Pt source/drain patterning was processed on the p-channel WSe 2 nanosheet, which is now on dielectric Al 2 O 3 as transferred by direct imprinting. According to the 3D scheme in Figure 1c, Ti/Au bottom gate electrode of WSe 2 nanosheet FET is noted as already prepared as a part of ZnO nanowire FET process; the nanosheet was transferred to be aligned on the gate. More details of our inverter device fab- rication are shown in Experimental section, and a schematic cross-section of our h-CMOS device is also shown in Sup- porting Information Figure S2. Tungsten diselenide (WSe 2 ), a dichalcogenide compound, has recently been studied along with molybdenum disulfide (MoS 2 ) as one of new important 2D semiconductors beyond graphene, [1,2] since it has a discrete energy bandgap over ≈1 eV while graphene has no gap. [3–7] In terms of device fabrication methodology using 2D semiconductors, mechanical exfoliation and imprint-to-transfer have mostly been implemented, [8–11] although recently large-scale direct growth method has also been in progress. [12] WSe 2 nanosheet field-effect transistors (FETs) show ambipolar-type conduction in general, [13–16] but the type of conduction strongly depends on the source/drain (S/D) contact material. Mobilities of the WSe 2 nanosheets range from 0.1 to a few hundreds cm 2 V –1 s –1 for exfoliated WSe 2 nanosheets in both n- and p-channel FETs. [17–21] In respects of functional applications, light-emitting diodes, photodetectors, and logic inverters have been reported to see any prospects of WSe 2 nanosheet-based electronics and optoelectronics. [22–29] In particular, since it has an ambipolar conduction, the fabrica- tion of complementary logic inverter (CMOS type) was imple- mented in complex of electron beam lithography and chemical doping; p-channel FET was readily obtained by using high work function metal contact such as Pt, while n-channel WSe 2 FET needed an aid of chemical doping for assured results. [28] However, the voltage gain of homogeneous WSe 2 -based CMOS was not that high and the n-type doping was not much stable in air ambient, while no gate dynamics have been reported yet. Besides, there are no reports about the power consump- tion and switching speed of CMOS logic device based on WSe 2 nanosheet, while it is one of the important advantages of CMOS device architecture. [30–32] Here, we introduce a 1D–2D hybrid complementary (h-CMOS) logic inverter by coupling p-channel WSe 2 nanosheet FET and n-channel ZnO nanowire FET on a glass substrate aiming at high speed, low-power-consumption devices. In order to place WSe 2 nanosheet near ZnO nanowire FET, we used a direct imprinting method. Considering the power con- sumption, we used one Ohmic and one Schottky contact for Adv. Mater. 2015, 27, 150–156 www.advmat.de www.MaterialsViews.com