Two-trap model for carrier lifetime and resistivity behavior in partially annealed GaAs grown at low temperature I. S. Gregory* TeraView Ltd., Platinum Building, St. John’s Innovation Park, Cowley Road, Cambridge, CB4 0WS, United Kingdom and Semiconductor Physics Group, Cavendish Laboratory, University of Cambridge, Madingley Road, Cambridge, CB3 0HE, United Kingdom C. M. Tey and A. G. Cullis Department of Electronic and Electrical Engineering, University of Sheffield, Mappin Street, Sheffield, S1 3JD, United Kingdom M. J. Evans TeraView Ltd., Platinum Building, St. John’s Innovation Park, Cowley Road, Cambridge, CB4 0WS, United Kingdom H. E. Beere and I. Farrer Semiconductor Physics Group, Cavendish Laboratory, University of Cambridge, Madingley Road, Cambridge, CB3 0HE, United Kingdom Received 21 February 2006; published 10 May 2006 We have developed a semiquantitative model based on Ostwald ripening to explain observed trends in both the carrier trapping lifetime and bulk resistivity when low-temperature-grown gallium arsenide is partially annealed. The effects of both point defects and precipitates are described independently, representing two distinct types of recombination center. The model predicts previously observed and hitherto unexplained anomalous features in the carrier lifetime and resistivity trends as the anneal temperature is increased. The predictions are supported by experimental measurements of the point defect concentration and precipitate parameters, using x-ray diffraction and transmission electron microscopy imaging, respectively. DOI: 10.1103/PhysRevB.73.195201 PACS numbers: 72.80.Ey, 61.72.Ji, 61.72.Bb I. INTRODUCTION Low-temperature-grown gallium arsenide 1–3 LT-GaAs is a common choice of material for many photoconduc- tive applications, owing to its unique combination of physi- cal properties. The characteristic short carrier lifetime 200 fs, high resistivity, high electron mobility, and high electric breakdown field make it suitable for use in devices including ultrafast optical switches, 4 transistors, 5 and solid- state terahertz transceivers, 6–8 among others. The optical and electronic properties of LT-GaAs, and in particular, the short carrier trapping lifetime, result from the high concentrations of native point defects, which may be introduced using nonstoichiometric molecular beam epitaxy MBE growth. Growth at temperatures significantly below the usual 580– 600 ° C suppresses the out-diffusion of ar- senic, allowing an excess to be incorporated. This excess arsenic may be manifested as three distinct types of point defects: arsenic antisite As Ga , interstitial As i , and gallium vacancy 9 V Ga . Single crystal growth is possible down to substrate temperatures of approximately 190 ° C, beyond which the strain produces grain boundaries, dislocations, and polycrystallinity. Low-temperature-GaAs is a term used to refer to material grown in the temperature range of around 190–350 °C. In as-grown i.e., unannealed LT-GaAs, the electron- trapping lifetime may be as short as 90 fs, 10 owing to the rapid trapping of electrons from the conduction band into mid-gap states. These states have been shown to be associ- ated with the ionized antisite defects, As Ga + , 11 which act as deep donors, approximately 0.7 eV below the conduction band edge. 12 However, the need for a high unilluminated bulk resistiv- ity is equally important for terahertz and other photoconduc- tive applications. Such material tends to have a low resistiv- ity 10  cm caused by hopping conduction between these states. 13 An additional problem is the possible satura- tion of the defect states, since each electron captured from the conduction band neutralizes a trap. This occurs because the electron-hole recombination time may be several orders of magnitude longer than the trapping time. 14 These problems are conventionally overcome by anneal- ing at high temperatures, promoting the migration of point defects to precipitates of metallic arsenic. These act as buried Schottky barriers, thereby increasing the resistivity through the creation of overlapping depletion regions. 15 In the con- text of a short carrier lifetime, the degradation resulting from the removal of point defects is assumed to be at least par- tially compensated by the high cross section of arsenic pre- cipitates for electron capture. 16 Furthermore, saturation ef- fects may also be overcome by the relatively large density of states in the precipitates. Typically, annealing at 600 °C is performed following growth, and this is known to increase the resistivity by up to five orders of magnitude. 13 The point defects are entirely removed in favor of large precipitates 10 nm, but the carrier lifetime is severely compromised, often to several picoseconds. Consequently, the annealing process represents a trade-off between a high bulk resistivity and a short carrier lifetime— properties which are simultaneously required by many appli- PHYSICAL REVIEW B 73, 195201 2006 1098-0121/2006/7319/1952018 ©2006 The American Physical Society 195201-1