PRZEGLĄD ELEKTROTECHNICZNY, ISSN 0033-2097, R. 95 NR 3/2019 97 Chuthong Summatta 1 , Sansak Deeon 1 Pathumwan Institute of Technology, Thailand (1) doi:10.15199/48.2019.03.23 Simple Anti Capacitor Open-circuit Self-oscillation in a CMOS Schmitt trigger-invertor Oscillator circuit for a Fail-safe Relay Drive Abstract. Oscillator circuits with a CMOS Schmitt trigger-inverter are commonly used in applications that relate to relay driver circuits. It is possible to devise a fail-dangerous occurrence from the circuit, in which an open fault happens at the input circuit between the capacitor and input inverter IC. The causes of this self-oscillation event contribute to the failure of other parts of the circuit. This paper presents countermeasures for self-oscillation of the capacitor open-circuit self-oscillation in a CMOS Schmitt trigger-invertor oscillator circuit for a fail-safe relay drive. The proposed circuit replaces a normal 2-pin capacitor with a special 4-pin designed capacitor which connects a parallel resistor between the input CMOS inverter and the ground source. This paper carried out experimentation using Failure Modes and Effects Analysis (FMEA).The results showed that the output logic was high when the circuit had an open fault. Thus, the new designed circuit had no fail-dangerous occurrences. Streszczenie. W artykule opisano środki zaracze zapobiegające samooscylacjom w obwodzie pojemnościowym CMOS przerzutnika Schmitta w obwodzie przekształtnika. Metoda poleg ana zastąpieniu dwukońcówkowej pojemności obwodem z czterema końcówkami z rezystorem miedzy wejściem przekształtnika a masą. Prosty układ kondensatora zapobiegający samooscylacjom w obwodzie przerzutnika Schmitta w układzie przekształtnika . Keywords: CMOS inverter, Self-oscillation, Open-fault, Fail-safe Słowa kluczowe: przekształtnik CMOS, samooscylacje, przerzutnik Schmitta. Introduction In the field of power electronics, especially motor drive systems, the motor current cut-off in terms of both fail-safe and cost-effectiveness is important because cut-off relays have additionally been provided and a driver circuit should be embedded in the motor drive control systems. Meanwhile, CPU-based safety-related control circuits are being utilised in the industry. However, such CPU-based safety-related control applications require certain subsidiary safety measures, e.g. diagnostic functions and redundant hardware structure, since their circuits are not simple. Moreover, CMOS elementary logic gates [1], which are widely used and easily available, are not normally applicable to safety-related controls because of the possibility of self-oscillation in the case of input open-faults. A key requirement of the safety relay drive circuit is no fail- dangerous occurrences when a fault occurs in the operation. The problem with such a circuit is self-oscillation (e.g. the input IC open-fault)[2]. The proposed relay drive circuit will be designed in the form of a fail-safe circuit [3] that does not use integrated circuits, a CPU, or complex systems. The paper [4-5] presents how to solve such problems by employing a special 4-pin designed capacitor covered by a metal shield between the input CMOS inverter and the ground source, which resolves the parasitic capacitance issue within the CMOS inverter. However, the solution could create a new problem where the capacitor or metal shield has an open-fault occurring spontaneously. Fault diagnosis of the analogue circuit is an area of great importance in the design, manufacturing and utilisation processes for electronic devices. For diagnostic methods, there are two main causes of such situations. The first is the difficulty in diagnosing analogue circuits due to the non-linear characteristics and tolerances of the system's elements. The second is new challenges such as limited access to the system’s interior. [6]. Safety analyses of newly-developed devices and systems are crucial to guaranteeing their safety. With regard to this fail-safe relay drive, IEC 61800-5-2:2007, adjustable speed electrical power drive systems, FMEA (Failure Modes and Effects Analysis) has been carried out, including being intentionally designed as a hardware-based component that is inherently safe.[7] This paper presents the oscillator circuit by CMOS inverter IC for the fail-safe relay drive circuit. Specific safety measures of this proposed circuit, which can be solved by improving relaxation oscillator circuit, are provided by special capacitors 4-pin and resistor. The circuits can counteract self-oscillation, which capacitor input open-fault, feedback resistor is not connected to input, and add the input resistance to maintain the level of the input signal logic. To guarantee safety, FMEA (Failure Modes and Effects Analysis) has been carried out, including multi- failure modes, as it has been intentionally designed as a hardware-based component that is inherently safe. CMOS Schmitt trigger Inverter oscillator circuit and capacitor open-circuit self-oscillation The countermeasures act against the CMOS self- oscillation with input open-fault in the oscillator circuit. It starts from the switching behaviour of the CMOS inverter, which can be achieved by study of the passive capacity and passive resistance. The equivalent circuit of CMOS inverter IC for consideration operation [8], when the input signal is operated at a low-level, the output is pulled through the PMOS device. When the input signal is operated at a high- level, the output is pulled through the NMOS to the ground. The stray capacitance between the junctions of the CMOS semiconductor structure as illustrated is shown in Figure 1. P R DD V SS V 1 ox C 2 ox C 3 ox C 4 ox C G V outp C outn C DD V SS V 2 3 2 inp ox C C  G V 2 outp ox C C  1 3 2 inn ox C C  1 outn ox C C  n R Fig.1. CMOS inverter schematic circuit with junction capacitance