Implementation of an Evolutionary Algorithm Using the Node-Depth-Degree Encoding in a Nios II processor in FPGA Gustavo Siqueira Vinhal, Anderson da Silva Soares, Telma Woerle de Lima and Gustavo Teodoro Laureano Intitute of Informatics Federal University of Goi´ as Goiˆ ania, GO, Brazil Clarimar Jos´ e Coelho Computer Science Departament Pontifical University Catholic of Goi´ as Goiˆ ania, GO, Brazil Marcilyanne Moreira Gois and Alexandre Cl´ audio Botazzo Delbem Instituto de Ciˆ encias Matem´ aticas e de Computac ¸˜ ao, Universidade de S˜ ao Paulo, S˜ ao Carlos, SP, Brasil Abstract—Many problems relevant to NP-Hard class are present in the real world. Among them we can mention the problems of network design (PNDs) that involve electricity distribution, vehicle traffic, and others. Do not exist efficient algorithms that provide an exact solution for these types of problems. Over the years research has been developed used evolutionary algorithms (EAs) to provide an efficient solution for these problems. In addition, appropriate data structures may further improve the performance of EAs to PNDs. The node-depth-degree encoding (NDDE) shows significant results for PNDs. The application of EAs in hardware can improve the performance of the algorithm. In this sense, this work presents the implementation of an EA in Nios II processor of a FPGA board to solving the PND minimum spanning tree with degree constraint. The results demonstrate that the implementation of EAs in hardware brings significant results with better performance, due to the power of parallelism present in the FPGA. Keywords: Network Design, Minimum Spanning Tree with Degree Constraint, Evolutionary Algorithms, Node-Depth-Degree Encoding, FPGA. I. I NTRODUCTION Network Design Issues (NDIs) are present in many real- world applications in fields of engineering and science. Such applications involve problems such as electricity distribution, vehicle routing, and computer networks, among others. In real-world scale, large amount of elements (vertices) and connections (edges) restricts the algorithms used for these problems. The traveling salesman problem [1] is an example for which there is no deterministic algorithm of polynomial complexity to solve it when the graph has large dimension. This type of problem is classified as NP-Hard in which there is no deterministic algorithm that runs in polynomial time to solve it. To solve these problems are used as approxima- tion algorithms such as metaheuristics and heuristics. These algorithms do not provide an exact solution to the problem, but a rough one. Among these techniques are highlighted the Evolutionary Algorithms (EAs, Evolutionary Algorithms). EAs have the simulation of the natural evolution of species as main point. Given a set (population) of individuals (possible solutions), at each iteration (generation) operators are applied for best individuals being found. However, EA with standard encoding may not be efficient when applied to a large network, i.e. with several vertices. In general, these EAs applied to large networks require processing time and memory for validation or correction of infeasible solutions. To improve the efficiency of an EA applied to a NDI with high complexity scale, dynamic data structures (encoding) have been researched more appropriate [4]. Such encodings increase the quality of solutions generated by the EA, as it enables better exploiting the search space. Furthermore, the use of specific encodings minimizes the need for remediation processes and validation of solutions. Among various encodings in the literature, the Node- Depth-Degree Encoding (NDDE, Node-Depth-Degree Encod- ing) stands out due to complexity O( √ n) while others require time O(n), where n and the number of vertices of the graph [9, 24]. Thus, a suitable encoding for NDIs for large scale. In this sense, the implementation of EAs that use a repre- sentation NDDE in FPGA (Field Programmable Gate Array) provides significant results in performance, allowing its use for NDIs with thousands and even millions of vertices. This result is possible due to the intrinsic parallelism of the FPGA that fits the EA processes in order to reduce the computational time. Furthermore, the implementation in FPGA allows the computation time becomes limited by a constant for graphs with different numbers of vertices. This work aims at developing an EA for the minimum spanning tree problem with restricted degree in in FPGA in its Nios II processor. The proposed EA will use the NDDE representation implemented in FPGA. The main goal with the development of the proposed EA is to analyze its ability to optimization with the maintenance of constant processing time. II. REPRESENTATION NODE-DEPTH-DEGREE The choice of representation is important to the perfor- mance of evolutionary algorithms (EAs). The choice of an inadequate representation can affect the convergence time of the algorithm, besides beholding the process similar to the methods of random [6].