IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, VOL. 51, NO. 10, OCTOBER 2004 571 A Regulated Body-Driven CMOS Current Mirror for Low-Voltage Applications Xuguang Zhang, Student Member, IEEE, and Ezz I. El-Masry, Senior Member, IEEE Abstract—A CMOS current mirror (CM) based on the body-driven technique and active feedback scheme is presented. The proposed CM is immune to the threshold voltage limitation and offers much higher accuracy over wider current operating range than other body-driven CMs. The complete analysis of the input–output characteristics, system dc current transfer error, frequency, and noise performance is provided. By using a 1.5 V/1 V single power supply and 0.18- m n-well process, SPECTRE sim- ulation results validate the analytical results and the overall good performance in terms of wider input–output voltage swing, lower input resistance, and larger output resistance compared with the conventional high-swing cascode CM. Index Terms—Analog circuits and signal processing, circuit theory and design, CMOS current mirrors (CMs), integrated electronics. I. INTRODUCTION C URRENT MIRRORS (CMs) are the basic building blocks in analog VLSI circuits. However, modern low-voltage (LV) submicron CMOS technologies with large second or higher order effects put a great challenge in designing high-per- formance CMs. There have been several CM realizations [1] and [2] in literature to circumvent these higher order effects. The most referenced CM topology is the high-swing cascode CM (HCCM) [3] shown in Fig. 1. The HCCM is less sensitive to the second-order effects and has high output swing. However, due to diode connection to the input MOSFET, the minimum re- quired input voltage of the HCCM is bounded by the threshold voltage . Recently, this restraint was eliminated and the input voltage swing was maximized by using triode-based CM structures [4] and [5] that employ level shifting or body-driven techniques. The level-shifting technique employs a simple voltage-level shifter between gate and drain of input MOSFET, thereby appreciably decreasing the input voltage. On the other hand, the body-driven technique [6] and [7] uses the MOSFETs body as the input terminal, while keeping the gate voltage constant to sufficiently turn the MOSFET on. Although there are some limitations inherited in the body-driven MOSFET [5], the fact of its equivalence to a depletion type device and its compatibility with standard CMOS technology makes it very Manuscript received January 31, 2003; revised March 3, 2004. This work was supported in part by the Natural Sciences and Engineering Research Council of Canada (NSERC), and the Canadian Network of Centres of Excellence in Microelectronics (MICRONET). This paper was recommended by Associate Editor U.-K. Moon. The authors are with the Department of Electrical and Computer Engineering, Dalhousie University, Halifax, NS B3J 2X4, Canada (e-mail: xzhang2@dal.ca; ezz.el-masry@dal.ca). Digital Object Identifier 10.1109/TCSII.2004.834536 Fig. 1. HCCM topology. attractive for LV designs. By taking the prototype of the conven- tional cascode CM, the cascode body-driven CM was proposed in [5]. However, the drain–source voltage mismatch of triode-mode MOSFETs leads to very poor input–output current matching. Furthermore, the current swing is limited by the cascode MOSFETs, which are also body driven. These drawbacks make the CM in [5] impractical in performing precise current mirroring. Another limitation is inherited in the body-driven technique itself: only the -type of body-driven CM is available for n(p)-well CMOS process. In this paper, a new body-driven based CM (BDCM) topology is introduced, which employs a simple active feedback to ef- fectively minimize the mismatch between two triode-mode MOSFETs. Thus, the current transfer accuracy is significantly improved. Moreover, the current operating range is extended by using gate-driven cascode MOSFETs. This paper is organized as follows. Section II briefly introduces the topology and oper- ating principle of the proposed BDCM. Section II-A discusses the input–output voltage requirements and Section II-B studies the input–output resistance characteristics. In Section II-C, an analytical formula of the dc current transfer error is developed. Section II-D provides the frequency analysis of the proposed BDCM. Section II-E presents the noise performance analysis. Simulation results are given in Section III followed by conclu- sions in Section IV. II. REGULATED BODY DRIVEN CMOS CM The proposed BDCM topology is depicted in Fig. 2(a) and its operating principle is briefly described as follows. Two matched triode-mode MOSFETs M1 and M2 perform current mirroring. 1057-7130/04$20.00 © 2004 IEEE