Accepted Manuscript ProNoC: A Low Latency Network-on-Chip based Many-Core System-on-Chip Prototyping Platform Alireza Monemi, Jia Wei Tang, Maurizio Palesi, Muhammad N. Marsono PII: S0141-9331(17)30241-7 DOI: 10.1016/j.micpro.2017.08.007 Reference: MICPRO 2611 To appear in: Microprocessors and Microsystems Received date: 10 May 2017 Revised date: 16 August 2017 Accepted date: 30 August 2017 Please cite this article as: Alireza Monemi, Jia Wei Tang, Maurizio Palesi, Muhammad N. Marsono, ProNoC: A Low Latency Network-on-Chip based Many-Core System-on-Chip Prototyping Platform, Microprocessors and Microsystems (2017), doi: 10.1016/j.micpro.2017.08.007 This is a PDF file of an unedited manuscript that has been accepted for publication. As a service to our customers we are providing this early version of the manuscript. The manuscript will undergo copyediting, typesetting, and review of the resulting proof before it is published in its final form. Please note that during the production process errors may be discovered which could affect the content, and all legal disclaimers that apply to the journal pertain.