Parallel Simulated Annealing Strategies for VLSI Cell Placement John A. Chandy Prithviraj Banerjee Center for Reliable and High-Performance Computing University of Illinois Urbana, Illinois 61801 Abstract Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive pro- cess, and as a result several research efforts have been undertaken to parallelize this algorithm. Most previous parallel approaches to cell placement annealing have used a parallel moves approach. In this paper we investigate two new approaches that have been proposed for generalized parallel simulated annealing but have not been applied to the cell placement problem. Results are pre- sented on the effectiveness of implementations of these algorithms when applied to the cell placement problem. We find that the first, multiple Markov chains, appears to be promising since it uses par- allelism to obtain near linear speedups with no loss in quality. The second, speculative computation, while maintaining quality is not suitable since no speedups are achieved due to the specific nature of the cell placement problem. The two algorithms are compared with the parallel moves approach to parallel cell placement. 1 Introduction With the rapid advances in VLSI process technology, circuit de- sign is becoming increasingly complex and in turn is placing ever higher demands on CAD tools. The use of parallel processing is fast becoming an attractive solution to reduce the inordinate amount of time spent in VLSI circuit design. This fact has been recognized by several researchers in VLSI CAD as is evident in the recent literature for cell placement, floor planning, circuit ex- traction, test generation, fault simulation, logic synthesis, etc. Standard cell placement is particularly expensive because of the inherent compute intensive nature of simulated annealing, the most popular approach to cell placement. There have been several attempts to parallelize this algorithm, usually with quality results that do not compare to the best available sequential algorithm, or with speedups that are less than desirable. In this paper, we exam- ine two parallel algorithms that have been proposed for general- ized simulated annealing. Though these algorithms are claimed to be general, they have yet be applied to the problem of cell place- ment. Thus, this paper tests their generality and attempts to de- termine the efficacy of these approaches for cell placement. The two algorithms, multiple Markov chains [1] and speculative com- putation [2], are designed to retain quality while at the same time providing acceptable speedups. This research was supported in part by the Semiconductor Research Cor- poration under contract SRC 94-DP-109 and the Advanced Research Proj- ects Agency under Army Research Office contract DAA-H04-94-G-0273. These algorithms have been implemented as part of the Prop- erCAD project [3], the major goal of which is to develop portable parallel algorithms for VLSI CAD applications that will run on a range of architectures. These include shared memory multi- processors such as the Encore Multimax and Sun 4/690MP, dis- tributed memory multicomputers such as the Intel iPSC/860, Intel Paragon, and Thinking Machines CM-5, and networks of work- stations. ProperCAD II provides C++ library-based machine-in- dependent runtime support in an object–oriented manner [4]. Through the use of a fundamental object called an actor [5], the library provides mechanisms necessary for achieving concur- rency. An actor object consists of a thread of control that commu- nicates with other actors by sending messages, and all actor ac- tions are in response to these messages. Specific actor methods are invoked to process each type of message, and actors are not allowed to block or explicitly make receive requests from other processors. The runtime system on each processor picks the next available actor thread with some priority and that thread is then allowed to run to completion without interruption. The rest of this paper is organized as follows. In the following two sections, we introduce the placement problem and review pre- vious work in parallel simulated annealing for placement, particu- larly the parallel moves approach. Section 4 describes the multiple Markov chains algorithm and variations upon that approach, and section 5 presents the speculative computation algorithm. 2 The placement problem The VLSI cell placement problem involves placing a set of cells on a VLSI layout, given a netlist which provides the connectivity between each cell and a library containing layout information for each type of cell. This layout information includes the width and height of the cell, the location of each pin, the presence of equiv- alent pins, and the possible presence of feed through paths within the cell. The primary goal of cell placement is to determine the best location of each cell so as to minimize the total area of the layout and the length of the nets connecting the cells together. One of the more popular sequential applications for placement has been the cell placement tool [6]. ’s core algorithm, simulated annealing, is a suitable ap- proach to problems like VLSI cell placement since they lack good heuristic algorithms. Briefly, simulated annealing is an iterative improvement strategy that starts with a system in a disordered state, and through perturbations of the state, brings the system gradually to a low energy, and thus optimal, state. A significant