IEEE TRANSACTIONS ON POWER DELIVERY, VOL. 29, NO. 5, OCTOBER 2014 2287 Impact of Short-Circuit Ratio and Phase-Locked-Loop Parameters on the Small-Signal Behavior of a VSC-HVDC Converter Jenny Z. Zhou, Member, IEEE, Hui Ding, Member, IEEE, Shengtao Fan, Member, IEEE, Yi Zhang, Senior Member, IEEE, and Aniruddha M. Gole, Fellow, IEEE Abstract—The impact of phase-locked loop (PLL) parameters on the dynamic and steady-state behavior of a voltage-source con- verter (VSC) in an HVDC transmission system is determined as a function of the system strength [parameterized by the short-circuit ratio (SCR)]. This is achieved by using a linearized small-signal model of the converter system and its controls. The model is val- idated via electromagnetic transients simulation of the fully de- tailed large signal model. An interesting result from this study is that the maximum power transfer capability of the VSC-HVDC converter is affected by the PLL gains, and that the theoretical limit (obtained from static voltage stability analysis) is approach- able as the PLL gains become very small. This paper shows that gains of the PLL, particularly at low SCRs, greatly affect the oper- ation of the VSC-HVDC converter and that operation at low SCRs approaching 1.3 is very difficult. Index Terms—HVDC transmission, maximum power transfer, phase-locked loop (PLL), short-circuit ratio (SCR), small-signal analysis, voltage-source converter (VSC). I. INTRODUCTION E ARLIER work [1] presented an investigation into the power transmission limitations imposed on a VSC-HVDC converter by ac system strength quantified by the short-circuit ratio (SCR) [2]. With an ac network fundamental frequency impedance of , the rated ac voltage and power of the VSC as and , respectively, this is given by . An important observation was that the maximum power transfer of the converter is affected by the SCR and the angle of the ac system impedance at the fundamental frequency. Re- search in [3] and [4] also indicated that for stable operation of the VSC-HVDC system, the short-circuit megavolt am- peres (MVA) of the ac network had to be somewhat larger than the transmitted dc power. Reference [5] showed that the Manuscript received August 19, 2013; revised December 09, 2013, February 02, 2014, and May 12, 2014; accepted June 06, 2014. Date of publication July 08, 2014; date of current version September 19, 2014. This work was supported by the Natural Sciences and Engineering Council (NSERC) of Canada. J. Z. Zhou, H. Ding, S. Fan, and A. M. Gole are with the Department of Electrical and Computer Engineering, University of Manitoba, Winnipeg, MB R3T 5V6 Canada (e-mail: jzhou@teshmont.com; umhvdc@gmail.com; shengtaofan@gmail.com; gole@ee.umanitoba.ca). Y. Zhang is with RTDS Technologies Inc., Winnipeg, MB R3T 2E1 Canada (e-mail: yzhang@rtds.com). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/TPWRD.2014.2330518 converter’s active-reactive power characteristic is constrained by the converter’s MVA rating and the configuration of the converter. However, the control system plays a large role in how closely these theoretical maximum power transfer limits are achievable, an aspect which has not been widely studied in earlier work. The phase-locked loop (PLL) is typically used for angle reference generation for the traditional line-commutated con- verter (LCC)-based HVDC and the newer voltage-sourced converter (VSC)-based HVDC transmission applications [6], [7]. This angle reference is used for generating the firing pulses for the insulated-gate bipolar transistor (IGBT) switches of the VSC. It has been recognized that operation at low SCRs is challenging for VSCs [1], [3], [4], [8]. Some authors have recommended an alternate firing methodology to the PLL [4], [8] as a solution to this challenge. Also, some earlier literature discusses the tracking capability of the PLL when connected to various distorted or changing ac waveforms [9] but does not consider the ac network impedance. There is a wide range of PLL types currently in use in HVDC schemes [10]–[13]. These follow the same operating principle, and differ mainly in the area of phase-angle measurement. The -type PLL presented in [10] is widely used in actual applica- tions [14] and is used in this paper. For other topologies, a sim- ilar analysis could be carried out using the approach presented in this paper, and may yield different numerical values for limits to operation. This additional analysis is left for future research. Indications of possible challenges of high grid impedance (al- though considering a different control strategy and without any discussion of PLL or synchronization issues) are given in [15]; whereas [16] uses simulation to show that the stability of a VSC with high grid impedance is affected by the PLL gains. Exam- ples of poor performance that can occur with the application of nonlinear current controllers in high grid impedance systems (again without considering the influence of PLL parameters) are also given in [17] [18]. Several studies [9], [19]–[21] of VSC converters operating as pulsewidth-modulated (PWM) rectifiers present the stability limits of the converter, and show how this stability limit can be influenced by converter controls. These studies do not explicitly address the issue of PLL parameters and their influences on the stability limits, but rather indicate how reactive power control might influence the stability limits with various system configurations. 0885-8977 © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications_standards/publications/rights/index.html for more information.