International Journal of Electrical and Computer Engineering (IJECE) Vol. 13, No. 5, October 2023, pp. 5253~5264 ISSN: 2088-8708, DOI: 10.11591/ijece.v13i5.pp5253-5264  5253 Journal homepage: http://ijece.iaescore.com Thermal aware task assignment for multicore processors using genetic algorithm Mohammed Parwez, Diary R. Sulaiman Department of Electrical Engineering, College of Engineering, Salahaddin University, Erbil, Iraq Article Info ABSTRACT Article history: Received Sep 16, 2022 Revised Jan 31, 2023 Accepted Feb 4, 2023 Microprocessor power and thermal density are increasing exponentially. The reliability of the processor declined, cooling costs rose, and the processor's lifespan was shortened due to an overheated processor and poor thermal management like thermally unbalanced processors. Thus, the thermal management and balancing of multi-core processors are extremely crucial. This work mostly focuses on a compact temperature model of multicore processors. In this paper, a novel task assignment is proposed using a genetic algorithm to maintain the thermal balance of the cores, by considering the energy expended by each task that the core performs. And expecting the cores’ temperature using the hotspot simulator. The algorithm assigns tasks to the processors depending on the task parameters and current cores’ temperature in such a way that none of the tasks’ deadlines are lost for the earliest deadline first (EDF) scheduling algorithm. The mathematical model was derived, and the simulation results showed that the highest temperature difference between the cores is 8 C for approximately 14 seconds of simulation. These results validate the effectiveness of the proposed algorithm in managing the hotspot and reducing both temperature and energy consumption in multicore processors. Keywords: Gem5 Genetic algorithm McPAT Multicore processor Thermal management This is an open access article under the CC BY-SA license. Corresponding Author: Diary R. Sulaiman Department of Electrical Engineering, College of Engineering, Salahaddin University Kirkuk Road, Erbil, Iraq Email: diary.sulaiman@su.edu.krd 1. INTRODUCTION Nowadays, the difficulties with thermal management in modern multi-core central processing units (CPUs) become increasingly significant and essential hence, one of the difficulties faced by electrical and computer designers is the thermal management of integrated circuits (ICs), as IC performance and reliability are impacted by temperature. According to studies in [1] the IC lifetime can be reduced by 50% for every 10 C to 15 C increase in the IC peak temperature hence, many research and articles are focusing on this issue. One of the methods of controlling chip temperature is consisting of active cooling integration (e.g., fan cooling, water circulation, and oil cooling and heat pipe). This technique is not always suitable for embedded systems especially those with limited size and battery. Another method of chip thermal management is a program management approach in which the temperature of the central processing unit (CPU) can be balanced by assignment of tasks to the CPU cores according to the cores’ thermal spot. This method doesn’t have a limitation of the method as mentioned above. Many polished articles studied the reduction of the peak/overall core temperatures by program management such as Rubio-Anguiano et al. [2] proposed a scheduler consisting of two stages: offline stage and online stage. In the offline stage, a minimum clock frequency is calculated that fulfills the deadline and partitioning scheme. And in the online stage, a fixed-priority zero laxity policy is applied as a global task