Please cite this article in press as: A.J.N. Batista, et al., F4E prototype of a chopper digital integrator for the ITER magnetics, Fusion Eng. Des. (2017), http://dx.doi.org/10.1016/j.fusengdes.2017.02.024 ARTICLE IN PRESS G Model FUSION-9094; No. of Pages 4 Fusion Engineering and Design xxx (2017) xxx–xxx Contents lists available at ScienceDirect Fusion Engineering and Design journal homepage: www.elsevier.com/locate/fusengdes F4E prototype of a chopper digital integrator for the ITER magnetics Antonio J.N. Batista a,∗ , Llorenc ¸ Capellà d , Andre Neto c , Stephanie Hall b , Graham Naylor b , Adam Stephen b , Jorge Sousa a , Bernardo Carvalho a , Filippo Sartori c , Roberto Campagnolo c , Isidro Bas e , Bruno Gonc ¸ alves a , Shakeib Arshad c , George Vayakis f , Stefan Simrock f , Luca Zabeo f a Instituto de Plasmas e Fusão Nuclear, Instituto Superior Técnico, Universidade de Lisboa, 1049-001 Lisboa, Portugal b CCFE, Culham Science Centre, Abingdon, Oxon, OX14 3DB, UK c Fusion for Energy, Josep Pla 2, 08019, Barcelona, Spain d Vitrociset Belgium Sprl, Gravendijckseweg 53, 2201 CZ, Noordwijk, The Netherlands e GTD Sistemas de Informacion, 08005, Barcelona, Spain f ITER Organization,Route de Vinon-sur-Verdon, CS 90 046, 13067, St. Paul Lez Durance Cedex, France a r t i c l e i n f o Article history: Received 20 October 2016 Received in revised form 20 January 2017 Accepted 5 February 2017 Available online xxx Keywords: ITER Integration drift Magnetics diagnostic Galvanic isolation MARTe MDSplus a b s t r a c t The main goal of this work is to demonstrate that a digital integrator based on the signal chopping concept is capable of attaining the ITER requirements. In particular, the ITER magnetics diagnostic requires a maximum flux drift of 500 V s/hour, among other specifications, for the signal integrators. As of today, known commercial integration modules do not fully comply simultaneously with all ITER magnetics requirements. A first phase of prototyping, presented in this work, comprises the development and testing of four design variants. Combinations of a SAR ADC (AD7960) and a Delta-Sigma ADC (ADS1675) with different analog front ends were used for the corresponding integrator prototypes. The designs have a common interface to an FPGA based system that receives the data acquired during the tests and streams it through a GbE link to a PC, where real-time digital integration of the signals is performed using the MARTe control framework. The GbE network also acts as the interfacing medium for the data archiving, through the connection of the integrator prototypes under test to an MDSplus based environment. This paper presents the integrator prototype designs developed and tests done so far. © 2017 Elsevier B.V. All rights reserved. 1. Introduction In ITER the magnetics diagnostic will be key to the control of many plasma parameters, including its position and shape. The availability of superconducting technologies has allowed a sub- stantial increase of the plasma discharge duration. One of the limiting factors of the magnetics diagnostic is that the integral error increases as a function of the experiment duration, that is, there is a time dependent drift of the integrated measurement. At constant environment temperature, drift arises mainly due to thermoelec- tric voltages of interconnections, offset voltages from electronic components and leakage currents. In the presence of environment temperature variations, the drift problem is further exacerbated. In the last years some solutions have been designed, imple- mented and tested on different superconducting machines [1–7]. ∗ Corresponding author. E-mail address: toquim@ipfn.tecnico.ulisboa.pt (A.J.N. Batista). Two main development branches are being pursuit, analogue inte- gration and real-time digital integration. Both approaches have advantages and disadvantages as discussed in [3]. Real-time digital integration using a signal chopping circuit for drift compensation is a promising solution and it is the basis of this work [3]. One advantage of digitally integrating, in real-time, the chopped signals from the coils is that it allows changes and optimizations in the signal processing chain, unlike analogue integrators where the output is already the integrated signal and changes are harder to implement if needed. Another advantage is that all the offsets voltages from electron- ics between the chopper circuit and the Analog to Digital Converter (ADC) are automatically compensated allowing the use of less demanding components, unlike analogue integrators where choos- ing the right components is critical [7] (e.g. zero drift amplifiers). One of the most challenging issues with chopper integrators is the necessity to evaluate precisely the total offset voltage resulting from passive components and wires interconnections between the http://dx.doi.org/10.1016/j.fusengdes.2017.02.024 0920-3796/© 2017 Elsevier B.V. All rights reserved.