IEEE ELECTRON DEVICE LETTERS, VOL. 18, NO. 7, JULY 1997 333 Innovative Localized Lifetime Control in High-Speed IGBT’s M. Saggio, V. Raineri, R. Letor, and F. Frisina Abstract—An innovative method to control carrier lifetime lo- cally and efficiently in Insulated Gate Bipolar Transitors (IGBT’s) is presented. It is based on the formation of void layers by low- energy and high-dose He implants and annealing. Voids introduce two well-defined midgap trap levels in silicon. HFIELDS simula- tions demonstrate the increase of surface hole concentration when a well localized recombination region is introduced in the buffer layer. High-speed IGBT’s were fabricated both with voids in the buffer layer or with unlocalized recombination centres. Devices with localized bandgap centres show a lower on-resistance with a fast turn-off behavior. I. INTRODUCTION I NSULATED Gate Bipolar Transistors (IGBT’s) have been attracting an increasing amount of interest in power elec- tronics because of their high-power operation with a relatively high switching speed. IGBT’s with an improved power dis- sipation loss, i.e., higher working frequencies, are even more attractive. For this reason many lifetime control methods have been developed to reduce the minority carrier lifetime so that increasing carrier recombination can reduce the current turn- off transient. To date, the approaches used have been mainly based on metal impurities (Au, Pt) diffusion [1], or point defect introduction by electron [2] or proton irradiation [3], [4] or by high-energy He or implantation [5]. Methods based on metal diffusion allows lateral confinement of the low lifetime region in less than 100 m, but throughout the entire wafer thickness, so that the method cannot be used for a fine lifetime control [6]. By electron irradiation it is not possible to obtain a depth localized lifetime control while, in the case of proton irradiation a vertical regulation of the damaged region, down to about 10 m, can be achieved. A better limitation of the damaged region can be obtained by helium or implantation, allowing a lifetime engineering to improve the IGBT’s characteristics [5]. However, masking of protons, , or high-energy He irradiation is difficult so that a very poor lateral control is obtainable 100 m . Moreover, they necessitate the use of very high energy accelerators. In the illustrated methods the localized lifetime control process has to be introduced as a final step due to the high metal diffusivity or to the low temperature point defect annealing. Recently, the possibility of obtaining voids in silicon by low energy He implantation was demonstrated to be fully compatible with standard wafer processing [7]. They are Manuscript received January 30, 1997. M. Saggio, R. Letor, and F. Frisina are with ST Microelectronics, I95121 Catania, Italy. V. Raineri is with CNR-IMETEM, I95121 Catania, Italy. Publisher Item Identifier S 0741-3106(97)05083-0. stable for very huge thermal budgets and can be introduced during device fabrication also as a first step. Voids can be well localized in depth (layers thinner than 100 nm) while their lateral definition is very sharp, limited only by masking capability [7]. Moreover, we found they introduce gap levels at 0.53 eV from the valence band for holes and at 0.55 eV from the conduction band for electrons, independently on their morphology [8]. Midgap property and immobility during heavy thermal budget processes (up to 1200 C for many hours) make voids ideal for lifetime control in silicon [9]. In this letter we present their application to IGBT’s to control lifetime locally and we will discuss the related aspects demonstrating that local damage methods allow better IGBT’s performance. II. RESULTS AND DISCUSSION One of the main reasons that induced us to use voids to con- trol lifetime is that they can be well localized. By HFIELDS [10] simulations, we could demonstrate the advantages of using a well localized lifetime control in IGBT’s. First of all, we considered a standard IGBT where the carrier recombi- nation time is assumed constant ( ns) throughout the structure. The obtained hole concentration in a vertical section through the JFET is plotted in Fig. 1 as a dashed line. In the same figure the continuous line shows the calculated hole concentration, at a collector-emitter voltage of 1 V, when the carrier recombination time in the device is 10 s except in a 20-nm thick region site in the buffer layer, at the void layer position, where it is 10 ns, i.e., the calculated valued when a void layer is introduced [11]. In the former case the hole injection is strongly reduced, however, at a depth of roughly 30 m the continuous line crosses the dashed line so that the number of holes reaching the surface is higher. The same behavior was observed for simulations in the 0.7–2 range, i.e., up to high hole injection from the substrate. This result was obtained only for a very narrow layer where an excessive reduction of the injection efficiency does not take place so that, according to our simulations, a lifetime control method able to localize traps in regions thinner than 50 nm is necessary. In order to evaluate the simulation result we fabricated on p-type silicon wafers 600 V IGBT’s with localized and unlocalized lifetime control. The localized centres were obtained by introducing voids in the buffer layer (see inset Fig. 1) by low energy (50 to 80 keV) and high dose ( to He/cm ) He implantation and subsequent annealing (900 C, 1 h) [7] before the 50- m 50- cm 0741–3106/97$10.00  1997 IEEE