Mater. Res. Soc. Symp. Proc. Vol. 1255 © 2015 Materials Research Society DOI: 10.1557/opl.2015.4 Leakage Current and Reliability on Planar High-k Capacitor with Al 2 O 3 Dielectric Deposited by Thermal-ALD S. Madassamy 1,2,3,4 , F. Voiron 1 , A. P. Nguyen 1,2 , A. Lefèvre 2 , G. Parat 2 , D. Buttard 3 , A. Sylvestre 4 1 IPDIA, R&D, 2 Rue de la Girafe, 14000 Caen, France 2 CEA Leti, LCRF, Univ. Grenoble Alpes, F-38000 Grenoble, France, CEA, LETI, MINATEC Campus, F-38054 Grenoble, France 3 CEA-Grenoble, SiNaPs, Minatec-BCA, 17 Avenue des Martyr, 38054 Grenoble Cedex 9, France 4 Univ. Grenoble Alpes, G2Elab, CNRS, F-38000 Grenoble, France ABSTRACT Due to its wide band-gap, Al 2 O 3 is known to have a moderate leakage current and a good dielectric strength [1]. Moreover, this dielectric has a fair permittivity and so constitutes interesting candidate as dielectric for Metal-Insulator-Metal (MIM) capacitor. Atomic Layer Deposition (ALD) allows obtaining a dense and thin Al 2 O 3 amorphous layer. ALD limits problems of interlayer diffusion because Al 2 O 3 is deposited underneath 400°C [2] which is essential when MIM are co-integrated with temperature sensitive structures. The aim of our investigation is to attempt to tie aluminum oxide properties dielectric with reliability from the help of capacitors of the entire wafer. In this way, conduction mechanism analysis and capacitance measurements were statistically led on the wafer. We particularly focus our study on the quantification of defects and their influence on the leakage current in planar capacitor. Firstly, to estimate the fixed oxide charges densities in the bulk of Al 2 O 3 and to analyze conduction mechanism, Metal-Oxide-Semiconductor (MOS) (Al/Al 2 O 3 /HR-Si) is developed. Then, a MIM stack (Al/TiN/Al 2 O 3 /TiN/HR-Si) is developed in order to evaluate the leakage current and the electrical reliability of thin films Al 2 O 3 based MIM capacitors. Different performances are observed according to the area on the wafer. That could be explained by the quality of the Al 2 O 3 layer and the interfaces between TiN and the oxide. I. INTRODUCTION The market trend for miniaturization has pushed the semiconductor industry to evolve in two complementary directions: “More Moore” with the continuous race towards extremely small dimensions hence the development of SOC’s (System On Chip) and recently "More than Moore" with the co-integration of heterogeneous devices. In the SBSiP approach (Silicon Based System in Package), high value capacitors for decoupling and filtering are integrated into a silicon passive die leading to both size and cost reduction. The components currently released at industrial level are commonly embedded multiple polysilicon electrodes combined with oxy- nitride dielectrics. For those components, good electrical characteristics have been demonstrated including high capacitance density, extended lifetime and low loss factors. In that context, many studies were carried out on new combinations of dielectric and electrodes to boost capacitors