704 IEEE TRANSACTIONS ON COMMUNICATIONS, VOL. 54, NO. 4, APRIL 2006 A New Deterministic Traffic Model for Core-Stateless Scheduling Gang Cheng, Li Zhu, and Nirwan Ansari Abstract—Core-stateless scheduling algorithms have been pro- posed in the literature to overcome the scalability problem of the stateful approach. Instead of maintaining per-flow information or performing per-packet flow classification at core routers, packets are scheduled according to the information (time stamps) carried in their headers. They can hence provision quality of service (QoS) and achieve high scalability. In this paper, which came from our observation that it is more convenient to evaluate a packet’s delay in a core-stateless network with reference to its time stamp than to the real time, we propose a new traffic model and derive its prop- erties. Based on this model, a novel time-stamp encoding scheme, which is theoretically proven to be able to minimize the end-to-end worst case delay in a core-stateless network, is presented. With our proposed traffic model, performance analysis in core-stateless net- works becomes straightforward. Index Terms—Core-stateless network, quality of service (QoS), traffic model, traffic scheduling. I. INTRODUCTION T HE Internet is expected to accommodate a variety of ap- plications with different quality-of-service (QoS) require- ments, such as video conferencing, interactive TV, and Internet telephony, as it evolves into a globe commercial infrastructure. However, today’s Internet only provides one simple service: best-effort datagram delivery, in which data packets may ex- perience unpredictable delay and packet loss rate and arrive at the destination out of order. Hence, more sophisticated mecha- nisms are urgently needed to provide less oscillatory and more predictable services for various applications. Two fundamental frameworks, namely, Integrated Services (Intserv) and Differentiated Services (Diffserv), have been pro- posed for this purpose. The Intserv approach [3]–[8], which aims to provide “hard” end-to-end QoS guarantees to each individual data flow, requires per-flow-based resource allo- cation and service provisioning and, thus, suffers from the scalability problem due to the huge number of data flows that Paper approved by A. Pattavina, the Editor for Switching Architecture Per- formance of the IEEE Communications Society. Manuscript received August 5, 2003; revised October 8, 2004, and September 25, 2005. This work was sup- ported in part by the New Jersey Commission on Higher Education via the NJ I-TOWER Project and the New Jersey Commission on Science and Technology via the NJ Center for Wireless Networks and Internet Security. This paper was presented in part at the IEEE GLOBECOM, San Francisco, CA, 2003. G. Cheng was with the Advanced Networking Laboratory, Department of Electrical and Computer Engineering, New Jersey Institute of Technology, Newark, NJ 07012 USA. He is now with VPIsystems Corporation, Holmdel, NJ 07733 USA. L. Zhu and N. Ansari are with the Advanced Networking Laboratory, De- partment of Electrical and Computer Engineering, New Jersey Institute of Tech- nology, Newark, NJ 07012 USA (e-mail: nirwan.ansari@njit.edu). Digital Object Identifier 10.1109/TCOMM.2006.873091 may coexist in today’s high-speed core routers. The proposed Diffserv model simplifies the design of core routers by aggre- gating individual flows at edge routers and provisioning only a number of services to the aggregated data flows at each core router. However, in this model, it is difficult to identify each individual flow’s QoS requirements at core routers and to contrive efficient resource allocation mechanisms to guar- antee the end-to-end QoS of each individual data flow. In addition, it has been shown [9] that, if all packets are served in a first-in-first-out fashion, the worst case delay bound is a function of the hop count and explodes at a certain utiliza- tion level. Thus, the overall utilization in such networks may be limited to a small fraction of its link capacities in order to provide guaranteed service delay. Various alternatives have been proposed in order to exploit the benefits of both Intserv and Diffserv and, at the same time, to mitigate their draw- backs. The operation of Intserv over the Diffserv model was introduced in [10]. In this model, the admission control and resource allocation procedures are adopted from those in the Intserv model so that sufficient resources can be reserved to satisfy the data flows’ QoS requirements, while the data flows are served in the network domain in a Diffserv fashion, i.e., data flows are aggregated and provided only with a limited number of services. Along with two new classes of aggre- gated packet scheduling algorithms, the static earliest time first (SETF) and dynamic earliest time first (DETF), Zhang et al. [11] showed that the maximum allowable network uti- lization level can be greatly increased while the worst case delay bound is decreased if additional time-stamp information is encoded in the packet header. In [12], a core-stateless ver- sion of jitter virtual clock (CJVC), which achieves the same worst case delay bound as jitter virtual clock (JVC), has been proposed. Like JVC, CJVC is nonwork-conserving, i.e., the server may be free even if there are packets in the buffer and, therefore, the network resource may be underutilized. Capable of providing the same delay bound as the corre- sponding stateful Guaranteed Rate (GR) server, a methodology to transform stateful GR per-flow scheduling algorithms into core-stateless version ones was proposed [13]. Based on the methodology [13], the authors also proposed the core-state- less guaranteed throughput (CSGT) network architecture in [14], which is a work-conserving network architecture that provides throughput guarantees to flows over finite timescales without maintaining a per-flow state in core routers. In [15], a distributed admission control to support guaranteed services in core-stateless networks has been proposed. Based on the virtual time reference system [16], admission control under the bandwidth broker architecture has been studied in [17]. 0090-6778/$20.00 © 2006 IEEE