Abstract—We investigate the performance of a high-speed optical switch for optically connected memory and study free-carrier absorption losses as the switch scales. The bit-rate dependent optical power budget is also analyzed for optically connected memory. I. INTRODUCTION Future CPU-memory communication requires larger capacity and higher bandwidth than is possible using current existing electrical interconnects. Leveraging wavelength division multiplexing (WDM), optically connected memory (OCM) has been demonstrated to enable high-bandwidth interconnectivity to large-capacity and physically-distant memory systems. Additionally, high-speed optical switches can provide flexible network connectivity for memory systems [1]. Integrated silicon photonic technologies are of interest for OCM due to their CMOS-compatible fabrication and low-power operation. To quantify OCM system scalability, it is essential to understand the link performance of silicon photonic networks. In this work, we analyze the bit-rate dependent optical power budget of a silicon photonic WDM link by using device parameters optimized to maximize the power budget. We then discuss the scalability of the OCM system when incorporating an optical switch. II. SYSTEM & SCALABLE OPTICAL SWITCH The WDM link for a memory system is presented in Fig. 1. The optical link includes cascaded silicon microring modulators on the transmitting side and demultiplexing microring filters on the receiving side. We assumed the simple case in which one CPU communicates with many OCMs through an optical switch. The separated OCMs are connected with the CPU by optical fibers. A high-speed Mach-Zehnder Interferometer (MZI) switch is a key component for the system. The methods for implementing control of the switch in a networked system have demonstrated in previous work using a FPGA testbed [2]. As seen in Fig. 2(a), cascading of several 2×2 MZI switches allows scalability of the one-to-many connection scheme. The basic 2x2 MZI silicon photonic switch evaluated for our scalability analysis was fabricated through OpSIS [3]. Both thermal heaters and p-i-n junctions were integrated on each MZI arm to control the optical phase as shown in Fig. 2(b). Fig. 3 shows switching characteristics using the p-i-n junction. A 0.64-Vpp PRBS signal with 0.94-V forward bias was applied to one arm of the MZI. Measured 10-90% rise and fall times were 2.2 and 3 ns, respectively. Our measurement of the optical loss was focused on the free-carrier absorption (FCA) loss, a critical parameter for switch scalability. To reduce the FCA loss, we adopted a control method using both p-i-n junctions Scalability of Silicon Photonic Enabled Optically Connected Memory Takashi Shiraishi 1,3 , Yang Liu 2 , Qi Li 1 , Xiaoliang Zhu 1 , Kishore Padmaraju 1 , Ran Ding 2 , Tom Baehr-Jones 2 , Michael Hochberg 2,4,5 , Keren Bergman 1 1: Department of Electrical Engineering, Columbia University, 500W 120 th St, New York, New York 10027 2: Department of Electrical and Computer Engineering, University of Delaware, 110 DuPont Hall, Newark, Delaware 19716 3: Fujitsu Laboratories Ltd, 10-1 Morinosato-Wakamiya, Atsugi 243-0197, Japan 4: Institute of Microelectronics, A*STAR (Agency for Science, Technology and Research), 11 Science Park Road, Singapore Science Park II, Singapore 117685, Singapore 5: Department of Electrical & Computer Engineering, National University of Singapore, Singapore 117576, Singapore ts2821@columbia.edu Tr/Tf=2.2ns/3ns (10-90%) 2ns/div Tr/Tf<100 ps 0.2ns/div (a) (b) Fig. 3. (a) Electrical input voltage to the p-i-n junction of the switch. (b) Optical output of the switch. 500 μm Electrical pad for control Input waveguide Thermal heater Output waveguide P-i-n junction (a) (b) 2x2 4x4 8x8 Fig. 2. (a) Structures of cascaded MZI switches. (b) A photograph of the 2×2 silicon photonic switch utilized in this measurement. A thermal heater and a built-in p-i-n junction are fabricated on each arm. ... Z Laser Ring filter Optical switch MEMORY MEMORY MEMORY MEMORY CPU Slot λ 1 λ 2 λ 3 λ 4 DRAM Ge PD Cascaded ring modulator Fiber Memory controller λ 1 λ 2 λ 3 λ 4 Silicon waveguide ... Fig. 1. An optically connected memory system composed of silicon photonic devices. 106 WA2 (Contributed) 9:15 AM – 9:30 AM 978-1-4799-2468-4/14/$31.00 ©2014 IEEE