IEEE JOURNAL OF SELECTED TOPICS IN QUANTUM ELECTRONICS, VOL. 20, NO. 4, JULY/AUGUST 2014 8202308 Amorphous-Silicon Inter-Layer Grating Couplers With Metal Mirrors Toward 3-D Interconnection JoonHyun Kang, Student Member, IEEE, Yuki Atsumi, Student Member, IEEE, Yusuke Hayashi, Student Member, IEEE, Junichi Suzuki, Yuki Kuno, Tomohiro Amemiya, Member, IEEE, Nobuhiko Nishiyama, Senior Member, IEEE, and Shigehisa Arai, Fellow, IEEE Abstract—Inter-layer grating couplers sandwiched by two metal layers were demonstrated for high coupling efficiency vertical cou- pling between amorphous-Si:H multi-stacked optical waveguides. A coupling efficiency of 83% was achieved with grating couplers formed on 5 μm wide waveguides separated by 1 μm while theo- retical coupling efficiency of 90% was obtained. Index Terms—Silicon photonics, amorphous-Si:H (a-Si:H) waveguide, multi-layer, vertical coupler, grating coupler, metal mirror. I. INTRODUCTION T HE optical interconnects are considered to be a critical technology for transmitting data in next-generation high- performance LSI chips [1], [2], as it can overcome the several difficulties that conventional electrical interconnects are facing due to the limitation in bandwidth capacity of metal wires [3]. As a promising approach for implementing such optical inter- connects, Si photonics has the potential benefits of providing a high degree of integration with current Si-based LSI chips in addition to the high-speed signal transmission. Optical compo- nents such as passive devices, modulators, photodetectors, and hybrid integration of lasers have been demonstrated on silicon on insulator (SOI) [4]–[7]. Photonic devices and electronic LSI chips can share the Si- based platform; however, they function best under substrate specifications that are quite different. For example, the typi- cal buried oxide (BOX) thickness of SOI wafers is ∼3 μm for photonic devices compared to less than 200 nm for state-of- Manuscript received October 4, 2013; revised December 1, 2013; accepted January 8, 2014. Date of publication January 14, 2014; date of current ver- sion March 11, 2014. This work was supported by the Ministry of Education, Culture, Sports, Science and Technology; by JSPS KAKENHI under Grants #24246061, #25709026, #21226010, #25420321, #11J08863, and #13J08096; by the Council for Science and Technology Policy under the Funding program for World-Leading Innovative R&D in Science and Technology; and by the New Energy and Industrial Technology Development Organization. The work of J. Kang and Y. Atsumi was supported by the Japan Society for the Promotion of Science for the Research Fellowship for Young Scientists. J. Kang, Y. Atsumi, Y. Hayashi, J. Suzuki, Y. Kuno, and N. Nishiyama are with the Department of Electrical and Electronic Engineering, Tokyo Institute of Technology, Tokyo 152–8552, Japan (e-mail: kang.j.aa@m. titech.ac.jp; atsumi.y.ab@m.titech.ac.jp; hayashi.y.ao@m.titech.ac.jp; suzuki.j. af@m.titech.ac.jp; kuno.y.ad@m.titech.ac.jp; n-nishi@pe.titech.ac.jp;). T. Amemiya and S. Arai are with the Department of Electrical and Electronic Engineering and the Quantum Nanoelectronics Research Center, Tokyo Institute of Technology, Tokyo 152–8552, Japan (e-mail: amemiya.t.ab@m.titech.ac.jp; arai@pe.titech.ac.jp). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/JSTQE.2014.2300058 the-art CMOS chips. Therefore, integrating photonic devices on LSI chips by a back-end process is a possible solution since there is no need to change the structures of the CMOS circuits. This requires that the fabrication process should be completed at temperatures below 400 ◦ C to avoid damage to the CMOS circuits. For such requirement, hydrogenated amorphous sili- con (a-Si:H) can be deposited at a temperature below 300 ◦ C by plasma-enhanced chemical-vapor-deposition (PECVD) and satisfies the back-end process compatibility, although the de- position temperature of crystalline Si is usually over 1000 ◦ C. There have been several reports on the low-loss property of a- Si:H waveguides. Many works have focused on the passivation of dangling-bonds by H atoms in order to reduce the absorption loss of a-Si:H [8], [9]. In a recent report, a loss of 1.2 dB/cm was achieved with wet etched a-Si:H film [10]. There are additional advantages of using a-Si:H. Multi-layer stacking of a-Si:H can be easily achieved by depositing alternat- ing layers of a-Si:H and SiO 2 films, which allows the creation of a high-density three-dimensional (3-D) optical circuit [11]. For realization of the multi-layered optical circuits, vertical coupling between the layers is necessary. Unlike in electronic connections such as VIAs [12], a vertical structure is not so easy to achieve in optical connection. Until now, mainly two types of vertical couplers have been investigated. One is a vertical coupler employing a directional coupler design [13]. High cou- pling efficiency is expected with such a structure; however, the distance between layers is typically limited to around 200 nm in order to achieve sufficient mode overlap. This causes undesired crosstalk in sections that should not have any coupling. There- fore, it is desired that the inter-layer distance be a relatively large value, such as 1 μm. Using the directional coupler for such sep- aration distance, it requires multiple couplers in order to couple light between vertically displaced photonic planes with a large separation [14]. The other approach is to use a pair of grating couplers. This approach can transfer light over a long distance of more than a few micrometers [15]–[17]. We proposed to use a pair of grating couplers for the inter-layer coupling at the inter- layer distance of 1 μm and achieved the coupling efficiency of 22% in the previous report [18]. These types of grating cou- plers were also reported for a chip-to-chip coupling between two separate SOI chips where two grating couplers were fab- ricated on two separate SOI chips and coupled through the air gap [19], [20]. In this paper, we propose and demonstrate a novel inter- layer grating couplers sandwiched by metal mirrors for effi- cient coupling between multi-layered a-Si:H waveguides. In 1077-260X © 2014 IEEE. Personal use is permitted, but republication/redistribution requires IEEE permission. See http://www.ieee.org/publications standards/publications/rights/index.html for more information.