International Journal of Scientific & Engineering Research, Volume 4, Issue 6, June-2013 2922 ISSN 2229-5518 IJSER © 2013 http://www.ijser.org Design and Verification of a Software Defined radio platform using Modelsim and Altera FPGA. Barun Sharma,P.Nagaraju,Krishnamurthy Vaidyanathan. Abstract-: The Altera Cyclone family of FPGA provides the ability to perform run time reconfiguration which is known as Dynamic Reconfiguration. Current technology allows designers to implement complete embedded computing systems on a single FPGA. Using an FPGA as the implementation platform introduces greater flexibility into the design process and allows a new approach to embedded system design. Since there is no cost to reprogramming an FPGA, system performance can be measured on-chip in the runtime environment and the system’s architecture can be altered based on an evaluation of the data to meet design requirements.This paper concentrates on designing a reconfigurable platform which consists of reconfigurable coprocessors that can be used in various applications. The architecture that we have developed for the generic reconfigurable coprocessor is well suited for multiple application domains. It ties in to the sequential RISC processor based C programming framework where in the coprocessor performs specific functions, replacing a C function call. The methodology adopted to develop reconfigurable platform can be implemented for performing mathematical operation such as addition, subtraction and to perform complex operation such as Autocorrelation, it can also be used in Image Processing, Cryptography etc. As an example to illustrate this methodology reconfigurable coprocessor consisting of wrapper module along with controller module are designed to control external device like LCD. The architecture of the proposed methodology presented in this paper were prototyped using a Cyclone IV Starter Board (DEO Nano), which is based on Nios II Embedded Evaluation Kit. Keywords: ALTERA FPGA,MODELSIM,LCD. ——————————  —————————— I.Introduction. Embedded computing systems typically comprise both processors and dedicated logic modules to meet design specifications that include performance, area, power, and cost constraints. This has led researchers to investigate numerous issues that arise from Hardware/Software co design. Although older systems combined fixed processors and integrated circuits, current technology allows designers to combine both processors and dedicated logic to implement complete embedded computing systems as Systems-on-Chip (SoC) using either ASIC or FPGA platforms[1]. The twentieth century saw the explosion of hardware defined radio (HDR) as a means of communicating all forms of audible; visual, and machine-generated information over vast distances. Most radios are hardware defined with little or no software control; they are fixed in function for mostly consumer items for broadcast reception. They have a short life and are designed to be discarded and replaced [2]. ———————————————— • Barun Sharma currently pursuing Masters of Technology in Digital Communication in RV College of Engineering, Bangalore ,560059.Phone number-9019121052,Email id-Barunshrm@gmail.com. • P.Nagaraju ,Associate Professor in Telecommunication Department in RV College of Engineering,Bangalore,560059.Email id- nagarajup@rvce.edu.in. • Krishnamurthy Vaidyanathan , CEO of EI LABS INDIA PVT LTD. Communications devices designed with application- specific integrated circuit (ASIC) technology suffer from one very significant limitation—the integrated circuits are not programmable. Therefore, deploying a new algorithm or an updated standard requires new hardware. The solution of above big problems can be solved by using the software defined radio (SDR), which comprised of both software and hardware, it use a reprogrammable ability of field programmable gate array (FPGA) or any possessor to built an open architecture. In this paper we prepare a design methodology to develop reconfigurable SDR platform using FPGA. The remainder of the paper can be categorized of following sections which are described as follows. Section 2 gives overview of SDR and basic definition related to reconfigurable platforms .Section 3 gives the descriptive view of various platforms that can be used to design Reconfigurable platform . Section 4 deals with the software packages required to implement the proposed flow of work. Section 5 contains the hardware requirement for the proposed work. Section 6 deals with general proposed methodology with the two examples to illustrate the importance of the design that has been proposed. Section 7 deals with results obtained and implementation of the proposed methodology using these software packages .Section 8 deals with conclusion. 2. SDR Overview. IJSER