Abstract— A neuron circuit design whose weights can be changed even after the fabrication is presented here. It is based on modified CMOS inverter synapses. Weights can be modified by changing the threshold voltage of the inverters. The application of this neuron model circuit design for the analog to digital converter has been implemented. The implementation has been done using CADENCE software VIRTUOSO tool using the 180 nm process technology for 1.8 V. Index Terms—neuromorphic circuit design,analog VLSI,ADC. I. INTRODUCTION ECENTLY there have been many implementations of the various neuron models starting from the simple formal neuron models[1] to the latest spiking neuron model based on mathematical equations[2],[3]. These implementation have been done keeping in mind to build some day a neuro- computer capable to perform the functions as that of the Human Brain. This trend got momentum after the pioneering work of C.Mead [4]. However for the implementation of the weights these neuron circuits use the Floating gate MOS transistors where the capacitance of the floating gate is used for weights. The poly silicon is used as capacitance in these Floating Gate MOS, so it requires larger area on the chip [5]. Also there has been implementation using the resistors for the weights [6]. But here also the weights once fabricated cannot be changed. Also the values are fixed after the fabrication process. C.K.Pham implemented the synapse circuits using the resistors. This circuit requires huge area because of the presence of resistors and the weights were fixed after the fabrication of the chip. So there is a need for less area and adjustable weight neuron circuit which is proposed in this paper. Since this neuron circuit is based on the simple formal model of the neuron it cannot be used to implement the neuro- computer rather can be used to realize the neural analog circuits because of its simplicity & less area required. We Manuscript received February 10, 2012. Syed Muffassir M. S. Ali is a student of Department of Electronics and Telecommunication Engineering, S. G. G. S Institute of Engineering and Technology, Nanded – 431601 (Maharashtra) India. (email: muffassir@gmail.com ) Dr.Suhas S. Gajre is with the Department of Electronics and Telecommunication Engineering, S. G. G. S Institute of Engineering and Technology, Nanded – 431601 (Maharashtra) India. suggest for the realization of neuro-computer spiking neuron model circuits should be used since they perfectly mimic the behavior of the human brain. The neural networks have been even used to implement the neural based analog circuits like the filter design ,analog multiplier , integrator and the ADC[7],[8],[9],[10]. For the implementation of the filter Rodriguez et al [11] used the floating gate MOS transistors. These circuits require large area because of the implementation of the capacitance using poly silicon floating gate capacitors. Also there have been few implementation of the neural based Analog to Digital Converter (ADC) [12],[13],[14]. These most implementations have been done using the symmetrical connections of the Hopfield Network. These circuits are highly complex and require huge hardware. Avitabile et al. [15] presented a class of neural networks with the nonsymmetrical connections in contrast to the Hopfield network. The implementation of feed-forward and nonsymmetrical network is reported by Mamoru. T et al. in [16]. Here the weights of the synapse were fixed by the value of the channel conductances of the MOS transistors. Also C. K. Pham implemented the ADC using the inverters but the presence of resistors made the circuit bulky. In this paper we have implemented the circuit for the ADC using our proposed neuron circuit. It requires less area and also the accuracy is better. The remainder of this paper is organized as follows. In Section II we have introduced the variable threshold CMOS inverter which is used for the neuron circuit model implementation. In Section III presents the modified novel neuron model circuits, where we can change the weights of the synapses using the control voltage Vc. In Section IV 3-bit neural based ADC is analyzed and implemented using the novel neural model presented. In Section V simulation results have been presented using the CADENCE software for 180 nm process technology. Finally in Section VI conclusions are drawn. II. ADJUSTABLE THRESHOLD CMOS INVERTER The transconductance K is fixed by the process parameters and the W/L ratio of the MOS transistors. The threshold voltage is determined by this K ratio in the CMOS inverters. The K is given by  = μCox   (1) Simple Neuron Circuit with Adjustable Weights and its Application to Neural Based ADC Syed Muffassir M. S. Ali, Dr.Suhas S. Gajre R International Conference on Emerging Technological Trends in Advanced Engineering Research [ICETT 2012], 2012 February 20-21. ISBN : 978-93-80624-62-4 http://www.icett.com/ Baselios Mathews II College of Engineering, Kollam, Kerala, India.