Improving the performance of incremental encoders with conditioning circuits based on FPGA Camilo Quintáns ⇑ , José Fariña, Jorge Marcos-Acevedo Department of Electronic Technology, University of Vigo, Spain article info Article history: Received 2 August 2015 Received in revised form 4 March 2016 Accepted 13 April 2016 Available online 13 April 2016 Keywords: Field programmable gate arrays Incremental encoder Position measurement abstract This work presents a conditioning circuit to improve the performance of incremental encoders that allows multiplying the number of counts by four with a high speed response. This circuit is described in VHDL and is synthesized for an FPGA so it can be included in an embedded system. Practical results of the solution, both from simulation and actual data, are presented. Ó 2016 Elsevier Ltd. All rights reserved. 1. Introduction This work deals with the incremental rotary encoders, which allows digitally encoding angular and linear position measure- ments using a digital conditioning circuit. Two main advantages are their high resolution (up to thousands of counts per turn) and their facility to measure displacements in both directions. This is due to the fact that they have got two square waves in quadra- ture (90° shifted) outputs A & B and, depending on which of them is high when the other changes, it is possible to determine the motion direction [1,2]. Moreover, they usually have got another output R that is active once every turn, then it can be used as an absolute reference. The conditioning circuit of these devices is mainly based on a high-speed high-resolution counter, which increments or decre- ments its value according to the phase between A & B, and whose clock source is usually provided by the XOR function of the two same inputs A & B. Traditionally, due to the necessity of doing very large counts with a high speed of the displacements (3000 rpm and 2500 pulses per turn implies 125 kHz of frequency), a variety of special hard- ware modules to coupling this sensors to digital processors (PLC, industrial PC, uC, etc.) have been used. In few cases, mainly using interrupts, software solutions have been achieved [3], or mixed ones [4]. Nowadays, thanks to the progress of the reconfigurable devices of the FPGA type, it is possible to implement in only one integrated circuit, as well as the digital processor, the necessary hardware to conditioning the extern digital signals to obtain a complete control system. In this paper a digital circuit to implement an incremental encoder conditioning circuit in an easy way, with the better res- olution, is presented (Fig. 1). Notice that resistors R1 and R2 have been added to limit the current input through the internal clamp diodes that are included in the EPC1 device, since it is powered by a voltage below 5 V (3.3 V). The core of the conditioning circuit is the finite Mealy state machine depicted in Fig. 2, which allows multiplying by four the effective number of pulses per turn pro- vided by the encoder. This improvement is possible because the counter is incremented and decremented each time there is a change in any input A & B. Therefore, in one period of the input signals A or B there are four transitions, which is the double resolution in comparison with traditional encoders conditioning circuits. 2. Results The logic analyzer waveforms (Fig. 3) show the signals A, B and R of a real encoder with 50 steps, which means a resolution of 200 counts per turn. This implementation has been tested with a Cyclone EP1C6Q240C6 device configured with the VHDL code of Fig. 5. POS signal (position) must have bits enough to encode all pulses depending on the utilized encoder. In this case 8 bits are enough to accomplish with the 200 pulses. In order to avoid haz- ards flip-flops D must be included to synchronize and debounce the inputs (Fig. 1). http://dx.doi.org/10.1016/j.measurement.2016.04.031 0263-2241/Ó 2016 Elsevier Ltd. All rights reserved. ⇑ Corresponding author. E-mail addresses: quintans@uvigo.es (C. Quintáns), jfarina@uvigo.es (J. Fariña), acevedo@uvigo.es (J. Marcos-Acevedo). Measurement 90 (2016) 1–3 Contents lists available at ScienceDirect Measurement journal homepage: www.elsevier.com/locate/measurement