Identifying the Performance of Porous Silicon Based Humidity Sensors at Different Gold Contact Pad Spacings Wan Nur Sabrina Wan Ahmad Aziz Rozina Abdul Rani* Nur Lili Suraya Ngadiman School of Mechanical Engineering, School of Mechanical Engineering, School of Mechanical Engineering, College of Engineering, College of Engineering, College of Engineering, Universiti Teknologi MARA, Universiti Teknologi MARA, Universiti Teknologi MARA, 40450 Shah Alam, Selangor, Malaysia 40450 Shah Alam, Selangor, Malaysia 40450 Shah Alam, Selangor, Malaysia wnsabrina@gmail.com rozina7370@uitm.edu.my lilisuraya95@gmail.com Mohd Fauzi Ismail Maizatul Zolkapli Ahmad Sabirin Zoolfakar School of Mechanical Engineering, School of Electrical Engineering, School of Electrical Engineering, College of Engineering, College of Engineering, College of Engineering, Universiti Teknologi MARA, Universiti Teknologi MARA, Universiti Teknologi MARA, 40450 Shah Alam, Selangor, Malaysia 40450 Shah Alam, Selangor, Malaysia 40450 Shah Alam, Selangor, Malaysia mohdfauzi305@uitm.edu.my maizatul544@uitm.edu.my ahmad074@uitm.edu.my Abstract— In recent years, porous silicon (PSi) substrate has been broadly studied by other researchers for microelectronics development due to its viable physical and chemical stability qualities. However, most of the studies published were primarily concerned with the synthesis, characterization, and uses of PSi. The influence of varying metal contact pad distances on humidity sensing performance was discovered to be rarely addressed in the current day. Therefore, this paper aims to investigate the influence of gold (Au) contact pad spacing on PSi in terms of the sensitivity and stability performance of humidity sensor application. In this study, PSi is synthesised via anodization and annealed at 250°C for 1 hour prior to humidity testing. The crystallinity of PSi was characterized using x-ray diffraction (XRD) analysis, which revealed a strong intensity of Si substrate diffraction peak at 69.3° (400) and a minor peak of cubic SiO2 at 33.1° (111) with low crystallinity. The sensor was tested for humidity detection in the 40% to 90% RH range using different contact gaps. Based on the results, the largest contact gap of 8.5 mm demonstrated the greatest sensitivity performance and output stability in comparison to the shorter contact gaps. The effect of varying the gap was visible in the current versus time graph of each RH level, with a significant decline in the device's sensitivity as the gap decreased. Thus, our results imply that the emission area expands as the gap width widens due to the increased availability of oxygen vacancies and active sites for electron mobility. Keywords—porous silicon, anodization, annealing, contact gaps, humidity sensor I. INTRODUCTION Bulk crystalline silicon (Si) has piqued the interest of many researchers over the years due to its numerous applications, including transistors, photovoltaics, sensors, and lithium-ion batteries [1]–[3]. Si has exceptional physical, chemical, and optical qualities due to its great mobility at extreme and ambient temperatures, resulting in better current flow through silicon conductors, making it the ideal substrate for advanced semiconductors. The latest breakthroughs in microelectronics development have reduced the chip size of bulk silicon while increasing its performance, leading to a high power density [2]. However, heat load management within small volumes has become one of the key factors for preserving the reliability and functionality of these devices as the decreasing chip size has affected the free pathways of heat carriers (electrons and phonons) [4]–[6]. Therefore, the synthesis of porous silicon (PSi), which exhibits excellent thermal dispersion and conductivity, is incredibly appealing to study as a potential solution to the issue. Porous structures can influence heat carrier transport by reducing the structural size and, thus, decreasing the effective mean free path [6]. Due to phonon confinement effects caused by the reduced phonon channels and increased phonon scattering at the pore interface, it is projected that a higher porosity with a smaller structural size will result in lower thermal conductivity [7]. Despite this, it has been reported that PSi is exceptionally facile to absorb gas molecules for sensing applications due to its large specific surface area that can approach 480 m 2 g −1 , and the bonding constraints induced by the Si-Si fracture [8]. The pore size can be significantly modified according to the desired application by varying several parameters during the anodization process such as concentration of electrolytes, anodizing duration, and the applied bias voltage [9], [10]. There are numerous techniques employed for synthesizing pores on the Si substrates, including anodic etching (anodization), photoetching, reactive-ion etching, ion implantation, and magnesiothermic reduction [11]–[13]. Among these techniques, anodization has emerged as the most desirable method for the PSi layer synthesis, mainly in the constant current mode, because of its simple 2023 IEEE 14th Control and System Graduate Research Colloquium (ICSGRC), 5 Aug 2023, Shah Alam, Selangor, Malaysia 979-8-3503-4623-7/23/$31.00 ©2023 IEEE 1 2023 IEEE 14th Control and System Graduate Research Colloquium (ICSGRC) | 979-8-3503-4623-7/23/$31.00 ©2023 IEEE | DOI: 10.1109/ICSGRC57744.2023.10215396 Authorized licensed use limited to: UNIVERSITI TEKNOLOGI MARA. Downloaded on March 13,2024 at 07:20:00 UTC from IEEE Xplore. Restrictions apply.