Copyright (c) 2011 IEEE. Personal use is permitted. For any other purposes, permission must be obtained from the IEEE by emailing pubs-permissions@ieee.org. This article has been accepted for publication in a future issue of this journal, but has not been fully edited. Content may change prior to final publication. Analysis, Design and Implementation of a Soft Switching Converter with Two Three-Level PWM Circuits Bor-Ren Lin 1 , Senior Member, IEEE, and Chia-Hung Chao 2 1 Department of Electrical Engineering, National Taipei University of Technology, Taiwan 2 Graduate School of Engineering Science and Technology, National Taipei University of Technology, Taiwan Abstract–This paper proposes a new soft switching circuit for high input voltage applications to achieve zero voltage switching (ZVS), implement load current sharing, reduce the voltage stress of switches at V in /2 and decrease current rating of the rectifier diodes and the output inductors. Two three-level pulse-width modulation (PWM) circuits with the same active switches are operated with the phase-shift PWM scheme. Two center-tapped rectifiers are adopted at the secondary side such that the current rating of the transformer windings, rectifier diodes and output filter inductors are reduced and have only one diode conduction loss in the forward current path. Based on the resonant behavior by the output capacitance of active switches and the leakage inductance (or external inductance), all power switches are turned on at ZVS. The operation principle, circuit analysis and design example are discussed in detail. Finally, experiments with 1kW prototype are provided to verify the effectiveness of the proposed converter. Index Terms—Three-level DC/DC converter, zero voltage switching. I. INTRODUCTION For medium/high power AC/DC converters, three-phase power factor correctors (PFC) have been used in the front stage to provide a stable DC bus voltage with V dc =500V-800V. Thus, MOSFETs with 500V (or 600V) voltage stress cannot be used in the rear DC/DC stage with half-bridge or full-bridge circuit topology. High voltage IGBT can be used in the rear DC/DC stage. But the low switching frequency is the main drawback of IGBT for high power density applications. The high voltage MOSFETs such as 900V voltage stress can be adopted in the rear DC/DC converter to overcome this problem. However, the main drawbacks of the high voltage MOSFETs are high cost and large turn-on resistance. Three-level or multi-level converters/inverters [1]-[8] have been proposed for high voltage and medium/high power applications. Based on the neutral point diode clamp, flying clamp or series full-bridge topology, the voltage stress of each power switches can be reduced at one-half of DC bus voltage. Therefore MOSFETs with 600V voltage stress can be used in the rear DC/DC converter for high input voltage applications. Three-level soft switching converters [9]-[15] have been proposed to achieve ZCS or ZVS for all switches at the desired load range. The three-level ZVS converters with the auxiliary circuit to extend the ZVS range were provided in [14]-[15]. However, the design procedure of the auxiliary circuit is very complicated. This paper presents a new soft switching converter consisted of two three-level PWM circuits to increase the output power. The main features of the proposed converter are low switching losses, ZVS turn-on and low voltage stress on MOSFETs. Two three-level PWM circuits with the same power switches are used to reduce the switch count, to decrease input ripple current, to reduce the size of the magnetic cores and to clamp the voltage stress of active switches at V in /2. Two center-tapped rectifiers are adopted to reduce the current rating of passive components at the secondary side. Compared to the conventional parallel three-level DC/DC converter with the same power level, the proposed circuit has less circuit components. Phase-shift PWM scheme is used to regulate the output voltage at the desired voltage level. Based on the resonant behavior by the resonant capacitance and the resonant inductance at the transition interval, all MOSFETs can be turned on at ZVS. The operation principle, circuit characteristics and design example are discussed in detail. Finally, experiments are provided to verify the effectiveness of the proposed converter. II. CIRCUIT CONFIGURATION Fig. 1(a) shows the circuit configuration of the proposed three-level ZVS PWM converter. C in1 and C in2 are equal and large enough to share the input voltage v Cin1 =v Cin2 =V in /2. S 1 -S 4 are power MOSFETs and the voltage stresses of S 1 -S 4 are clamped at V in /2. C r1 -C r4 are the output capacitances of MOSFETs S 1 -S 4 , respectively. D a and D b are the freewheeling diodes. C fly is the flying capacitor and its voltage is equal to V in /2. C 1 and C 2 are the DC blocking capacitances. The DC blocking voltages V C1 and V C2 are equal to one-half of the input voltage. L r1 and L r2 are the resonant inductances. L m1 and L m2 are the magnetizing inductances of the transformers T 1 and T 2 , respectively. D 1 -D 4 are the rectifier diodes. L o1 and L o2 are the output filter inductances. C o and R o denote the output capacitance and load resistance. There are two three-level ZVS PWM circuits with the same power switches and the flying capacitor and diodes in the proposed converter. The first three- level ZVS circuit is given in Fig. 1(b). The components of circuit 1 include C in1 , C in2 , D a , D b , C fly , S 1 -S 4 , C r1 -C r4 , C 1 , L r1 , T 1 , D 1 , D 2 and L o1 . The phase-shift PWM scheme is used in the proposed converter. S 1 and S 4 are the leading switches, and S 2 and S 3 are the lagging switches. The PWM signals of S 1 and S 4 are complementary each other with a dead time to allow ZVS operation. Similarly, the PWM signals of S 2 and S 3 are