A SimPLR Method for Routability-driven Placement Myung-Chul Kim * , Jin Hu * , Dong-Jin Lee and Igor L. Markov University of Michigan, Department of EECS, 2260 Hayward St, Ann Arbor, MI 48109-2121 {mckima, jinhu, ejdjsy, imarkov}@eecs.umich.edu ABSTRACT Highly-optimized placements may lead to irreparable routing con- gestion due to inadequate models of modern interconnect stacks and the impact of partial routing obstacles. Additional challenges in routability-driven placement include scalability to large netlists and limiting the complexity of software integration. Addressing these challenges, we develop lookahead routing to give the placer advance, firsthand knowledge of trouble spots, not distorted by crude congestion models. We also extend global placement to (i) spread cells apart in congested areas, and (ii) move cells together in less-congested areas to ensure short, routable interconnects and moderate runtime. While previous work adds isolated steps to global placement, our SIMultaneous PLace-and-Route tool SimPLR in- tegrates a layer- and via-aware global router into a leading-edge, force-directed placer. The complexity of integration is mitigated by careful design of simple yet effective optimizations. On the ISPD 2011 Contest Benchmark Suite, with the official evaluation proto- col, SimPLR outperforms every contestant on every benchmark. 1. INTRODUCTION In earlier technology generations, placement and routing algo- rithms were designed and implemented in separate software tools, even when the user interface exposed a single optimization to chip designers. After logic synthesis, a placer generates row- and site- aligned, non-overlapping locations for cells with small interconnect length (HPWL) 2 . A global router then routes all signal nets, with small total wirelength, subject to track capacity constraints. Yet, common placement metrics no longer capture key aspects of solu- tion quality at new technology nodes [2,27]. Wirelength-optimized placements often lead to routing failures when the placer is not aware of actual routes [11]. Prior work incorporates routing con- gestion analysis into global placement (see Section 2), but lacks in several aspects. First, simplified congestion models do not cap- ture phenomena salient to modern layouts, e.g., the impact of non- uniform interconnect stacks and partial routing obstacles on con- gestion. Second, the placement techniques that best control whites- pace allocation in response to congestion (min-cut and annealing- based) are no longer competitive on the largest layouts. Third, incremental post-placement optimization alone is often insufficient as it cannot change the structure of global placement. Challenges in congestion estimation [2]. A successful estimator must account for up to twelve metal layers with wire widths and spacings that differ by up to 20×. Blockages and per-layer routing rules must be modeled as well. Other constraints include via spac- ing rules and limits on intra-gcell routing congestion. After the 2007/2008 ISPD contests, academic routers NTHU-Route 2.0 [8], NTUgr [13], FastRoute 4.0 [39], BFG-R [14] started to account for these issues. More recent routers — PGRIP [38], PGR (SGR) [23], GLADE [9,20] — have improved solution quality and runtime, and account for different layer directives. 1 M.-C. Kim and J. Hu contributed equally to this work. 2 Half-Perimeter WireLength, defined using the net bounding box Routability-driven placement can pursue several different opti- mization objectives, such as ensuring 100% routability, even at the cost of significant routing runtime. Alternatively, one can evaluate placements by a layer-aware global router with a short time-out, which nevertheless correlates with the final router (and is poten- tially based on the same software implementation). This interme- diate objective is more amenable to optimizations in global place- ment because its quick evaluation facilitates a tight feedback loop. In other words, intermediate placements can be evaluated many times, allowing the global placer to make proper adjustments. As we show in Section 5, due to the correlation between the fast and the final router, resulting routability-driven placements may fare better even with respect to the former, more traditional objective. This approach also facilitates early estimation of circuit delay and power in terms of specific route topologies. On the other hand, biasing the global placer away from HPWL to more sophisticated routability metrics may adversely affect the global placer’s overall optimization capabilities. In other words, if HPWL increases too much, routability metrics will also increase. In this work, we directly address the challenges of routability- driven placement. First, we develop lookahead routing, which invokes a fast high-quality 3-d global router, to quickly estimate routability. Since the produced routes can be used as a routing solu- tion, our method can accurately and quickly report both congestion and routed wirelength. Second, to produce competitive placements in terms of both routed wirelength and HPWL, we integrate our lookahead routing into a flat, quadratic global placer, and enhance placement iterations by gently coercing cell locations and relieve congestion while preserving interconnect length. In detailed place- ment, we do not change the objective functions as in [42], but pro- hibit moves that aggravate routability. In global placement, we tem- porarily inflate cells in highly-congested regions to reserve whites- pace during global placement. Traditionally, this has been accom- plished either by cell bloating [4, 12, 26] during/after global place- ment, or by whitespace allocation [21, 27, 40] after placement. We observe that wirelength-driven global placers typically limit area utilization by a given amount through the entire layout based on tar- get density. Therefore, in addition to cell bloating, we dynamically adjust the target density based on total routed wirelength. 3 This technique preserves overall solution quality and allows the placer to move cells in uncongested regions closer. Third, we develop a simultaneous place-and-route framework for global placement as well as a routability-driven detailed placement algorithm. Our proposed methodology offers several advantages. First, since we use a global router to estimate congestion, the routes for all nets are known. Second, by enabling the global placer to directly redis- tribute whitespace in response to routing congestion, we establish a more precise feedback loop (compared to add-on techniques pro- posed previously). Third, by using a variable target density, we are trading off wirelength for routing demand in congested regions. 3 Partitioning-based placers can adjust target density on a per region basis [4, 27]. In force-directed placers, this feature is more difficult to implement and seems unnecessary.