RESEARCH ARTICLE A portable class of 3‐transistor current references with low‐power sub‐0.5 V operation Felice Crupi 1 | Raffaele De Rose 1 | Maksym Paliy 1 | Marco Lanuzza 1 | Mattia Perna 1 | Giuseppe Iannaccone 2 1 Department of Computer Engineering, Modeling, Electronics and Systems Engineering, University of Calabria, Rende I‐87036, Italy 2 Department of Information Engineering, University of Pisa, Pisa I‐56122, Italy Correspondence Felice Crupi, Department of Computer Engineering, Modeling, Electronics and Systems Engineering, University of Calabria, Rende I‐87036, Italy. Email: felice.crupi@unical.it Summary This work proposes a new class of current references based on only 3 transistors that allows sub‐0.5 V operation. The circuit consists of a 2‐transistor block that generates a proportional‐to‐absolute‐temperature or a complementary‐to‐ absolute‐temperature voltage and a load transistor. The idea of a 3T current reference is validated by circuit simulations for different complementary metal‐oxide‐semiconductor technologies and by experimental measurements on a large set of test chips fabricated with a commercial 0.18 μm complementary metal‐oxide‐semiconductor process. As compared to the state‐of‐art competitors, the 3T current reference exhibits competitive performance in terms of temperature coefficient (578 ppm/°C), line sensitivity (3.9%/V), and power consumption (213 nW) and presents a reduction by a factor of 2 to 3 in terms of minimum operating voltage (0.45 V) and an improvement of 1 to 2 orders of magnitude in terms of area occupation (750 μm 2 ). In spite of the extremely reduced silicon area, the fabricated chips exhibit low‐process sensitivity (2.7%). A digital trimming solution to significantly reduce the process sensitivity is also presented and validated by simulations. KEYWORDS CMOS analog design, current reference, Internet of things (IoT), low‐power, low‐voltage 1 | INTRODUCTION The fast‐increasing demand for Internet‐of‐things (IoT) systems poses several challenges to the circuit designers because of their stringent constraints in terms of energy efficiency, low standby power consumption, ultralow voltage operation, low area consumption, and reduced variability in spite of the device miniaturization. 1-5 Current references are key build- ing blocks of analog and mixed‐signal circuits used in IoT systems. Their principal task is to fix the bias point of the amplifier stages, thus playing a fundamental role in the performance of the overall system. The aforementioned constraints for IoT systems are clearly transferred to the design specifications of current references. In spite of the interest for low‐voltage and low‐power current references, only a limited number of topologies have been proposed so far, 6-13 especially if compared with the huge number of solutions proposed for the voltage reference counterpart (eg, see previous studies 14-22 ). The above current references achieve nanopower consumption, but they are unable to work with bias voltage (V DD ) lower than 1 V, except for the solution proposed by Cucchi et al, 12 which presents a minimum bias voltage of 0.8 V. It is worth pointing out that even 0.8 V is still too high for most of the emerging solutions for IoT nodes. A second common drawback of the proposed nanopower solutions is the large Received: 22 July 2017 Revised: 4 October 2017 Accepted: 30 October 2017 DOI: 10.1002/cta.2439 Int J Circ Theor Appl. 2017;1–17. Copyright © 2017 John Wiley & Sons, Ltd. wileyonlinelibrary.com/journal/cta 1