191 TEMPERATURE DEPENDENCE OF RF LOSSES IN HIGH-RESISTIVITY SOI SUBSTRATES D. Lederer and J.-P. Raskin Microwave Laboratory of the Université catholique de Louvain, Louvain-la-Neuve, Belgium Abstract: This paper analyzes RF substrate losses in High-Resistivity (HR) SOI and oxidized HR bulk silicon wafers. Through experimental and simulation data, it is shown that when sufficiently high trap densities are introduced at the buried SiO 2 /Si interface, HR silicon substrates are virtually lossless up to approximately 100°C, remain acceptable for high temperature RF applications up to 120~150°C, depending on the oxide thickness, but show no significant improvement compared to standard resistivity substrates above 200°C. Key words: CPW, High temperature, RF losses, interface traps, oxide charges 1. INTRODUCTION High-Resistivity (HR) Si substrates with resistivity values higher than 3 kΩ.cm are suitable for High-Frequency applications due to their negligible ohmic losses 1,2 . However, oxide-passivated HR Si substrates usually suffer from resistivity degradation near the SiO 2 /Si interface due to the presence of fixed charges (Q ox ) in the oxide 3 . These charges attract free carriers near the substrate surface, forming an accumulation or inversion layer. Coplanar structures made on such substrates are very sensitive to the presence of this layer, which can also be formed underneath metallic lines upon the application of a DC bias 4 . In all cases the presence of free carriers underneath the oxide leads to substantial RF loss increases. As shown in 4 and 5 , an efficient way to (partially or entirely) remove those carriers is to introduce a large density of traps (D ( ( it ) at the SiO 2 /Si interface. This can be achieved by adjusting the oxide deposition parameters 4 or by introducing an additional trap-rich layer between the oxide and the Silicon substrate. In 5 and 6 , a polySilicon layer was used to form an Oxide-Polysilicon-Silicon (OPS) substrate. In both cases, the RF structures designed on the OPS D. Flandre et al. (eds.), Science and Technology of Semiconductor-On-Insulator Structures and Devices Operating in a Harsh Environment, 191-196. © 2005 Kluwer Academic Publishers. Printed in the Netherlands.