International Journal of Computer and Electrical Engineering, Vol. 2, No. 3, June, 2010 1793-8163 413 Abstract—Pulse Width Modulation (PWM) is a common technique used in many different applications. This technique is the heart of the inverter system. This paper reported a modified strategy in asynchronous unipolar sinusoidal PWM (SPWM) switching scheme based on ACEX1K50TC144-3 Altera Field Programmable Gate Array (FPGA). The carrier frequency was designed for 20 kHz and the fundamental frequency was designed to adjust 1 to 100 Hz, with step increase in 1 Hz. A new SPWM signal generation strategy is proposed and compared to traditional SPWM generation technique. The design entry is conducted by Max+plus II version 10.2 through schematic and VHDL programming. The verification in level simulation and hardware realization has been done. As the result, the proposed modified SPWM signal generation strategy works properly and can reduces the usage of logic cell (LC) until 63.75%. Index Terms—Drive, FPGA, inverter, PWM. I. INTRODUCTION Pulse Width Modulation (PWM) has become the facto in industrial standard. PWM is a common technique used in many different applications. This technique is the heart of the inverter system control signal. Up to now, many types of modulating modes have been brought forward in motion control and power conversion, such as sinusoidal PWM, space vector PWM, current tracking PWM, harmonic elimination PWM and so on [1, 2, 3, 4]. These methods have some advantages and disadvantages, but the most widely techniques used are the sinusoidal PWM and the space vector PWM. Most of these PWM techniques are realized by software and motion control Application-Specific Integrated Circuit (ASIC). There are also some analog circuits in ASIC. ASIC is a very good approach to generate PWM signals; its’ performance and cost have challengeable advantages. However, their design is limited by semiconductor manufacturers and the users cannot change their functions. The most famous SPWM ASICs include Siemens SLE4520, Marconi MA818, and Phillips HEF4752V. They are Manuscript received August 13, 2009. This work was supported in part by the Competition Grant Research (PHB) scheme on the 2006-2007 years, the Directorate General of Higher Education, Ministry of National Education, Republic of Indonesia. Tole Sutikno is with the Department of Electrical Engineering, Faculty of Industrial Technology, Universitas Ahmad Dahlan (UAD), Yogyakarta, Indonesia e-mail: thsutikno@ieee.org or tole@ee.uad.ac.id Mochammad Facta is with the Department of Electrical Engineering, Faculty of Engineering, Universitas Diponegoro (UNDIP), Semarang, Indonesia, e-mail: facta@ieee.org or facta@elektro.ft.undip.ac.id successful as the total digital control IC, and they can be used independently as well as incorporated into a microprocessor-based system [5]. But the switching frequency can be up to 1000Hz, so it is only suitable for low speed power devices as BJT and GTO, not for IGBT or MOSFET. Many efforts have been conducted to make strategies of PWM generation in analog or digital domain. The digital PWM generation techniques have successfully eliminated the component drift and tolerance problems associated with earlier analogue implementation. The digital designs based on FPGA have been used successfully in many different electric system applications such as in power converter PWM inverter. Speed performance is considered as an appropriate solution in order to boost the performance of controllers for industrial control systems as an effort to reduce the gap between the analog and digital world [6, 7]. Designing a PWM inverter drive using FPGA has several advantages, such as quick, modifiable, and suitable for prototyping. The PWM technique has been the subject of intensive research. Recently several researches were conducted in generating PWM with FPGA. De Castro, et al [8] who had created single PWM based on XC3S200-4FT256 Spartan FPGA by using the DLL (or PLL) available in almost FPGA for single phase inverter drive. Md Isa, et al [9] had created unipolar SPWM for single phase inverter drive based on FPGA, but they did not state what type of the FPGA was used. The design and simulation is conducted by using Max Plus II software. However, the unipolar SPWM method offers a good opportunity for the realization of the inverter control [10]. This paper has proposed a new unipolar SPWM signal generation strategy for three phase inverter drive based on FPGA. By using the higher carrier frequency and the proper ratio of carrier and modulated reference frequency, this method has possibility to reduce the harmonics in three phase converter. Also by using only 1/6 segments of modulating signal in each phase, it is expected that this technique can reduce the usage of logic cells (LCs) in the Altera FPGA, and the memory requirements. II. THREE PHASE SPWM SIGNAL GENERATION TECHNIQUE In conventional method, SPWM uses a sinusoidal modulator and a triangular carrier wave. By comparing these two signals, the control pulses of each inverter branch are determined. The conventional SPWM generation technique An Efficient Strategy to Generate High Resolution Three-Phase Pulse Width Modulation Signal Based on Field Programmable Gate Array Tole Sutikno, Member, IACSIT & IEEE, Mochammad Facta, Member, IEEE