Microelectronics and Solid State Electronics 2012, 1(3): 69-73 DOI: 10.5923/j.msse.20120204.04 Performance Analysis of CNTs as an Application for Future VLSI Interconnects Sandeep Sharma 1,* , Rajeevan Chandel 1 , Pankaj Kr. Pal 2 , Rituraj S. Rathore 3 1 E&CE Department, National Institute of Technology-Hamirpur, Hamirpur, 177005, India 2 ECE Department, Indian Institute of Technology-Roorkee, Roorkee, 247667, India 3 ECE Department, Techno India NJR Institute of Technology, Udaipur, 313001, India Abstract This paper presents performance evaluation of different types of carbon-nanotubes(CNTs) based interconnects viz. Single-walled carbon nanotubes(SWCNT), Bundle SWCNT(B-SWCNT), Multiwalled CNT(M-WCNT) as well as Copper interconnects. The CNT-metal contact resistance has been taken into consideration in the model used in this work. In case of copper interconnects the effect of surface scattering and grain boundary scattering is accounted for. The effect of change in B-SWCNT packaging density on performance of B-SWCNT is analyzed for the first time. A method is proposed to find out the packaging density of a symmetric B-SWCNT structure. SPICE simulations verify the results for 45nm technology node. Keywords Carbon Nanotube, Single Walled Carbon Nanotube, Bundle Single Walled Carbon Nanotube, Multiwalled Carbon Nanotube, Mcnt 1. Introduction According to the ITRS[1] the interconnect dimensions will become smaller and smaller down to nanometric regime in the near future. As the interconnect size is scaled down, the resistivity of the copper increases mainly due to grain and surface scattering effects. This effect along with the higher current densities requirement that must be carried by the future interconnects makes the copper interconnects more and more vulnerable to electro migration failure in the near future. In addition it is also observed that at 130 nm technology node approximately 51% of microprocessor power was consumed by interconnect. It is also projected that without changes in design philosophies, in the next five years up to 80% of microprocessor power will be consumed by interconnect[2]. The CNTs have the potential to provide solution for the resistivity and electro migration problems faced by the copper interconnects in deep submicron technology. The high current densities, increased reliability, promising electrical, thermal and mechanical properties of the CNTs make them the attractive candidate for next generation integrated circuit(IC) applications[3]. This paper is based on the authors work in[4] where electrical modelling(R, L, C) of various types of CNT based * Corresponding author: ssvedant17@gmail.com (Sandeep Sharma) Published online at http://journal.sapub.org/msse Copyright © 2012 Scientific & Academic Publishing. All Rights Reserved interconnects like Single Walled CNT(SWCNT), Bundle Single Walled CNTs(B-SWCNT) both for perfectly metallic and the most naturally occurring case(one- third metallic) and Multiwalled CNTs(MWCNTs) is done at 45 nm technology node. The paper presents the results of the authors work in[4]. It is shown that under the most practical conditions(actual interconnect dimensions as per ITRS) only the MWCNTs can give better performance in terms of delay than Copper and all other types of CNT based interconnects at local, intermediate and global interconnect levels. The MWCNTs are easier to fabricate with less concern about chirality and density control can thus act as an replacement for traditional Copper interconnects at local, intermediate and global interconnect levels. It is also found that under the most practical conditions (actual interconnect dimensions as per ITRS) the SWCNTs can give the best performance in terms of power. Both the SWCNT and MWCNT outperforms the copper interconnects in terms of average power dissipation at local, intermediate and global interconnect levels. While it is found that the B-SWCNTs are not able to outperform copper interconnects presently in terms of both speed and power. 2. Previous Work Several studies have been carried out to investigate the performance of CNT based interconnects. The work in[5] shows that the densely packed CNT bundle can provide an improvement in the interconnect speed. However the work