Effect of Nitric-Oxide Post-Oxidation Annealing on High-Temperature Oxidized 4H SiC Jeong Hyun Moon 1 , Kuan Yew Cheong 2 , Ho Keun Song 1 , Jeong Hyuk Yim 1 ,Myeong Suk Oh 1 , Jong Ho Lee 1 , Wook Bahng 3 , Nam-Kyun Kim 3 and Hyeong Joon Kim 1 1 Department of Materials Science and Engineering, Seoul National University, Seoul, 151-742, Korea 2 School of Materials and Mineral Resources Engineering, Universiti Sains Malaysia, Engineering Campus, 14300 Nibong Tebal, Seberang Perai Selatan, Penang, Malaysia 3 Power Semiconductor Research Group, Korea Electrotechnology Research Institute (KERI), P.O. Box 20, Changwon, Gyungnam 641-120, Korea Tel: +82-2-880-7162, Fax: +82-2-874-7626, E-mail: hjkim@plaza.snu.ac.kr 1 Metal-Oxide-Semiconductor FETs using 4H-SiC have been investigated intensively because 4H-SiC semiconductor has excellent physical properties for power-device applications. 1,2,3 However, ideal on-resistance of the MOSFETs has not been realized due to very low channel mobility. One of the origins of the low channel mobility is because of high interface-trap density (D it ) closer to conduction-band edge. The prevailing factor contributing to the high D it is the existence of intrinsic carbon that originated from two sources: (1) residual carbon from surface of substrate prior to oxidation and (2) carbon generated at the interface during oxidation. 4,5 In this paper, we have investigated MOS characteristics of thermally nitrided SiO 2 on 4H SiC at high oxidation temperature (≥1300 o C). A comparison has also being made between the nitrided and dry oxides. N-type 4H-SiC wafers with 5-μm thick epilayer doped with (0.9~1.5)×10 16 cm -3 of nitrogen and chemically cleaned with a modified RCA method with a final dip in dilute HF solution (HF:H 2 O=1:9) were used in this work. The wafers were inserted into a tube furnace and then oxidized in a dry oxygen environment at 1300 and 1400 o C. The oxidation time was controlled to obtain a 65~70-nm thick oxide. After the oxidation, one set of sample was underwent post-oxidation annealing (POA) in nitric acid (NO) ambient (1175 o C), while other sample did not go through the annealing process. After cooling down, top of the samples were deposited with a layer of aluminium using a thermal evaporator. The areas of the MOS capacitors were then defined by photolithography. Finally, after removing the back oxide, a large area aluminum back contact was deposited on the N + substrate. A computer-controlled Keithely 590 CV analyzer/595 Quasistatic C-V meter was employed at room temperature to measure capacitance-voltage (C-V). The D it was estimated by simultaneous high-low C-V method. Dry oxide grown at 1300 o C is having a lower D it than the oxide grown at 1400℃ (Fig. 1). A reverse situation has been recorded in NO POA sample, whereby a higher growth temperature demonstrates a lower D it value but it is still higher than its none-annealed International Conference Silicon Carbide and Related Materials 2007 (ICSCRM2007) Mo-134 Mo-P-65