IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING, VOL. 22, NO. 1, FEBRUARY 2009 1 Special Section on the International Symposium for Quality Electronic Design 2008 (ISQED 2008) D ESIGNS in deep submicron technologies at and beyond 60 nm face significant challenges. Higher performance and increasing circuit density have exacerbated the impact of manufacturing variations on the quality of designs. This has made it increasingly more difficult to meet a variety of design quality targets within a tighter schedule. This special section of IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING is devoted to papers that appeared in the International Symposium on Quality Electronic Design 2008 (ISQED-2008), held March 17–19, 2008, in San Jose, CA. Since 2000, the International Symposium on Quality Elec- tronic Design (ISQED) has been a premier Design and Design Automation conference aimed at bridging the gap between electronic design tools and processes, integrated circuit tech- nologies, processes, and manufacturing to achieve design quality. The conference provides a forum to present and ex- change ideas, and to promote the research, development, and application of design techniques and methods, design processes, and EDA design methodologies and tools that address issues which impact the quality of realizing designs into physical integrated circuits. The ISQED emphasizes a holistic approach toward design quality and intends to highlight and accelerate cooperation among the IC design, EDA, semiconductor process technology, and manufacturing communities. All papers submitted to ISQED are peer-reviewed. A subset of the top rated papers in the area related to EDA issues from the ISQED 2008 submissions were invited by a selection com- mittee for this special section. Six of the invited contributions were accepted for publication after undergoing two cycles of review. The five papers included in this special section and one paper to be published in the May 2009 issue were chosen based on the quality of their ideas as they relate to process-design in- teractions. The first paper, by Goel et al., propose a methodology to ob- tain statistical timing models of large macro cell and IP blocks considering process variations. In this paper, the authors have developed models for capturing both inter-die and intera-die variations in device and interconnect parameters. The proposed approach shows good accuracy. The second paper, by Wang et al., model the effects of random process variation using measured transistor current. The authors Digital Object Identifier 10.1109/TSM.2008.2011625 are then able to use the model as a replacement for Monte Carlo methods for calculating circuit voltage and current variances for analog circuits. They also use the model to calculate timing delay variations of digital circuits. The third paper, by Kanj et al., develops a method for rapidly determining the stability of SRM cells with random dopant fluc- tuations. Their results have good agreement with SPICE and are found to have a 65X speed up over more traditional simulation methods. The fourth paper, by Yelamarthi and Chen, provides an overview of optimizing a circuit to minimize the impact of process variation on timing. The fifth paper, by Sundareswaran et al., develops a method- ology to characterize standard cells for intra-cell mismatch vari- ations. The authors propose a clustering approach to charac- terize the delay variations for cells due to intra-cell mismatch variations. The proposed approach results in as much as 12x runtime improvement compared with Monte Carlo simulation. The sixth paper, “Robust analog design for automotive ap- plications by design centering with safe operating areas,” by Sobe et al., will be published in the May 2009 issue of this TRANSACTIONS. This paper demonstrates a methodology to im- prove the yield of automotive circuits. In their work, the process development kits are used with design centering software to re- duce the sensitivity from model paramter variations due to both process variations and across a wide range of temperatures. The ISQED will continue to contribute to quality of electronic design. We welcome your participation at the tenth symposium March 16–18, 2009, in San Jose, CA. We would like to thank all the authors and the members of the DFM subcommittee for their cooperation in preparing and reviewing manuscripts. The ISQED is grateful for the support of IEEE EDS, IEEE CASS, IEEE RS, ACM/sigDA, SEMI, and the IEEE TRANSACTIONS ON SEMICONDUCTOR MANUFACTURING. PETER WRIGHT, Guest Editor Synopsys Mountain View, CA 94043 USA DANIELA DE VENUTO, Guest Editor Dipartimento di Elettrotecnica ed Elettronica Politecnico di Bari 70125 Bari, Italy 0894-6507/$25.00 © 2009 IEEE