AN S-DOMAIN BASED FRAMEWORK FOR ACCURATE AND EFFICIENT STATIC WAVEFORM ANALYSIS Ahmed Shebaita Dusan Petranovic Yehea Ismail IBM Shebaita@eg.ibm.com Mentor Graphics, Dusan_petranovic@mentor.com Nanoelectronics integrated systems Northwestern University/Nile University ismail@eecs.northwestern.edu yismail@nileuniversity.edu.eg ABSTRACT A novel methodology for accurate and efficient static timing analysis is presented in this paper. The novel methodology uses the traditional cell library table structure with one modification, instead of filling the cell library tables with the 50% delay and slew of the gate output signal, the cell library tables are filled with the gate output signal moments. This approach eliminates the error due to the ramp approximation at the gate output which is based only on the 50% delay and slew. Simple convolution of the gate output moments by the interconnect moments yields the signal moments at the stage output. The parameters of the gate input signal, which are used for the table access of the successive stage, are directly computed from the predecessor stage output moments using closed form expressions. Thus, the interconnects and the gates are uniformly treated in a moment- based homogeneous framework. The novel approach inherits the classical cell library tables approach efficiency with even reduced computation complexities. As compared to the classical cell library table approach, the proposed approach accounts for the increasingly nonlinear waveform shapes and provides accuracy and flexibility in the path performance calculations. Increasing the accuracy in the novel approach is made flexible by simply using more moments. To illustrate the concept and prove its merits, multiple examples are presented with 2-3 moments which maintain accuracy within 1-3% versus 10-20% for the classical cell library table approach as compared to SPICE. 1. Introduction Static timing analysis (STA) is one of the crucial steps in gate level design flows. Improving the performance and accuracy of STA has been the focus of recent research work in both, academia and industry, [8]-[14]. STA is based on a circuit decomposition (decoupling) into nonlinear gates and linear interconnects, which are treated separately. In these methodologies, the gates are pre-characterized by dynamic simulations using various input slew times, t s , and output effective capacitances, C eff . The cell library tables for the output delays and the output slew times are generated and stored for the in circuit delay calculation [2][3]. Examples of the classical cell library tables are shown as Table 1 and in Table 2 for 50% rise delay and rise slew, respectively, of a typical 65 nm CMOS inverter gate. The effective capacitances and the delays in Table 1 and Table 2 are in picofarads and nanoseconds, respectively. Table 1: The rise Propagation Delay library Table For A Typical Inverter 0.0015 0.085 0.155 0.33 0.59 0.92 1.24 0.026 0.07 0.14 0.2 0.34 0.52 0.77 1.01 0.075 0.08 0.15 0.2 0.34 0.53 0.78 1.02 0.31 0.1 0.18 0.23 0.36 0.55 0.8 1.04 0.72 0.11 0.184 0.236 0.37 0.56 0.81 1.05 1.2 0.09 0.17 0.23 0.35 0.53 0.8 1.04 1.8 0.07 0.16 0.21 0.35 0.53 0.78 1.02 2.2 0.04 0.13 0.18 0.32 0.51 0.76 1.0 Table 2: The rise Slew library Table For A Typical Inverter 0.0015 0.085 0.155 0.33 0.59 0.92 1.24 0.026 0.0159 0.125 0.22 0.47 0.82 1.2 1.72 0.075 0.016 0.126 0.22 0.474 0.821 1.21 1.73 0.31 0.02 0.126 0.223 0.475 0.823 1.21 1.73 0.72 0.027 0.131 0.228 0.476 0.823 1.22 1.74 1.2 0.035 0.148 0.234 0.476 0.824 1.23 1.741 1.8 0.04 0.146 0.235 0.477 0.825 1.231 1.741 2.2 0.05 0.146 0.236 0.478 0.83 1.234 1.742 On the other hand, the interconnects are treated as linear networks and, typically, the impulse response moment based methods [1][4][5] are used to reduce the interconnect networks and to propagate the delays and ramp times to the inputs of the next stages in the IC paths. The accuracy of the classical cell library tables approach depends mainly on how accurate it is to model the gate input waveform and the gate output waveform with simple shifted ramp signals. With the continuous scaling down in current Deep Submicron Technologies, DSM, and increased nonlinear effects, the ramp approximation is making the classical cell library table approach, despite being very efficient, increasingly inaccurate. A time shifted exponential was introduced as an alternative one- parameter waveform model to represent the gate input signal behavior more accurately [24] and keep the 2-D structure of the cell library tables. Thereafter, two-parameter waveform models were also introduced trying to increase the accuracy at the expense of increasing the cell library tables size which had to be 3-D instead of being 2-D tables. The most common two- paramter waveform models are the Gamma cumulative density function [25] and the Weibull cumulative density function [24]. Ceff t i s Ceff t i s 978-1-4244-5750-2/10/$26.00 ©2009 IEEE