This work has been submitted to the IEEE for possible publication. Copyright may be transferred without notice, after which this version may no longer be accessible. In Search of a Standards–Based Approach to Hybrid Performance Monitoring Jim Harden, Donna Reese, Marlene Evans, Sudi Kadambi, Greg Henley, and Chuck Hudnall NSF Engineering Research Center for Computational Field Simulation Mississippi State University Cedell Alexander IBM Networking Hardware Division Research Triangle Park, NC Abstract—A new multicomputer performance monitoring system is described in this paper. Where possible, the system employs portable performance monitoring instrumentation technology and leverages previous work. Trace event acquisition is hardware assisted and based on the MultiKron, a single–chip measurement solution developed at the National Institute for Standards and Technology. The user interface is based on the Pablo Performance Analysis Environment, a visualization and sonification toolkit developed at the University of Illinois. The SPIscope is introduced as a component that bridges the gap between these emerging standard interfaces. The SPIscope provides a high–bandwidth path to a large secondary storage for recording performance data. Connectivity to the user’s performance analysis workstation is via a TCP/IP LAN. Facilities are provided to support application–specific trace events, breakpoint–style debugging, on–line transmission of selected data, and dynamic acquisition–rate control. By using existing technology and interfaces, we hope to contribute a performance monitoring component with greater utility throughout the parallel processing community. Key Words—hybrid monitoring, hardware monitoring, performance visualization, per- formance monitoring, instrumentation, multicomputers, parallel systems, standards I. INTRODUCTION Anyone who has worked with distributed memory parallel systems can attest to their some- times mystifying and often disappointing performance. This is not surprising considering system complexity. Computer designers and application analysts must somehow optimally orchestrate the actions of architectural components possessing limited bandwidth and performance–crushing latencies. Intertwined with architectural considerations are a wide range of computer science is- sues such as algorithmic techniques, programming paradigms, advance compilers, and operating _____________________________________ This research is supported in part by National Science Foundation CISE Instrumentation Program grant CDA–9222917.