Exact ESOP expressions for incompletely speciﬁed functions M. Sampson n , M. Kalathas, D. Voudouris, G. Papakonstantinou Computer Science Laboratory, School of Electrical and Computer Engineering, National Technical University of Athens, Greece article info Article history: Received 29 April 2010 Received in revised form 13 October 2011 Accepted 14 October 2011 Available online 28 October 2011 Keywords: ESOP Minimization Do not cares Six variables abstract In this paper, a method for ﬁnding an exact ESOP expression for an incompletely speciﬁed arbitrary boolean function of up to six input variables is proposed. To achieve this, the weight of all 5-variable functions, has been tabulated in a compressed table, which is used extensively in our approach and speeds-up computation time. To the best of our knowledge, this is the ﬁrst paper dealing with exact solutions of incompletely speciﬁed functions. & 2011 Elsevier B.V. All rights reserved. 1. Introduction Research on the minimization of logic functions has been lately focused on ESOP (Exclusive or Sum of Products) expres- sions. Although minimization of ESOP expressions is more difﬁ- cult than the minimization of respective SOP (Sum of Products) expressions, certain attractive properties of ESOPs can compen- sate for the increased intricacy. For example, in application domains like arithmetic, telecommunications or error correcting applications, the use of XOR (eXclusive OR) gates may reduce the complexity of logic circuits [1,2]. For an n-variable function, the upper bound in the number of cubes is 29  2 n7 , for n 46 [3], as opposed to 2 n1 for SOPs. Interest in XOR minimization has also increased recently due to their extensive use in reversible and quantum circuits. For those circuits, the XOR gate is the basic building block, since it is inherently reversible and XOR minimization algorithms lead to smaller and more efﬁcient implementations. ESOP expressions have been extensively studied in the past. A variety of algorithms and systematic methods have been proposed for the generation of ESOP expressions for arbitrary, completely speciﬁed logic functions. However, most problems rely on incompletely speciﬁed functions, which contain do not care terms. The mapping of incompletely speciﬁed functions, of one or multiple outputs, as well as the minimization of the respective ESOP expressions remain open research. The existence of do not care terms increases the difﬁculty and complexity of the problem and, currently, only heuristic algorithms exist at this moment for minimization of these functions. Efforts to represent incompletely speciﬁed functions in com- pact form, using different categories of decision diagrams, can be found in the literature. In [7], Ordered Ternary Decision Diagrams (OTDD) are described and used to represent such functions, while in [8] several categories of decision diagrams, including Kronecker Decision Diagrams (KDD), which may represent incompletely speciﬁed functions, are introduced. In the present paper we do not use decision diagrams at all. Moreover, the above papers cannot guarantee minimality, as opposed to this paper. Apart from decision diagrams, other ways for ESOP minimiza- tion of incompletely speciﬁed functions are also present in the literature. Perkowski and Chrzanowska-Jeske [9] describe a mini- mization algorithm, based on Helliwell’s decision function for even/odd covering problems, stating that it is very time consum- ing. No experimental results to be compared with are available. MINT [10] and EXORCISM-MV-2 [6] are heuristic ESOP minimiza- tion algorithms, based on cube transformation rules, and hence they also cannot guarantee minimality. Simple rewrite rules and simulated annealing are used by Parilla et al. [11] to construct a non-deterministic heuristic minimizer which cannot guarantee minimality. In another work [12], a cube transformation operation has been used, to construct the non-deterministic heuristic algorithm QuickDCMIN. A constant number of cubes is selected in each step, forming a new function which, in turn, is decomposed into its subfunctions. We stress that the aforementioned heuristic algo- rithms differ from the approach used in this work in the sense Contents lists available at SciVerse ScienceDirect journal homepage: www.elsevier.com/locate/vlsi INTEGRATION, the VLSI journal 0167-9260/$ - see front matter & 2011 Elsevier B.V. All rights reserved. doi:10.1016/j.vlsi.2011.10.001 n Corresponding author. Tel.: þ306947040464; fax: þ302107721533. E-mail addresses: sampson@cslab.ntua.gr, sampson.marinos@gmail.com (M. Sampson), mkalath@cslab.ntua.gr (M. Kalathas), dvoudour@cslab.ntua.gr (D. Voudouris), papakon@cslab.ntua.gr (G. Papakonstantinou). INTEGRATION, the VLSI journal 45 (2012) 197–204