The Depth Irreducibility Hypothesis Periklis A. Papakonstantinou Tsinghua University Abstract We propose the following computational assumption: in general if we try to compress the depth of a circuit family (parallel time) more than a constant factor we will suffer super-quasi- polynomial blowup in the size (number of processors). This assumption is only slightly stronger than the popular assumption about the robustness of NC, and we observe that it has surprising consequences. Note also that the choice of super-quasi-polynomial blowup is the smallest bound that avoids the circuit class collapse of [Vol98]. In this proposal we put our assumption in perspective, discuss its relation to the existing literature, and show that it has two important consequences. The first consequence is NC 6= SC, where NC is the class characterized by uniform circuits of poly-logarithmic depth and polynomial size, and SC is characterized by algorithms that run in poly-logarithmic space and polynomial time. For the second consequence we use an additional but mild complexity assumption to obtain a strong separation between the graph isomorphism GraphIso and the group isomorphism GroupIso problem. In particular, we show that GraphIso is not reducible to GroupIso using circuits of O(log n) depth. 1 Background Depth reduction in circuits or equivalently parallel time speedup is one of the most fundamental questions in computation and engineering. Let a given family of circuits C = {C n } ∞ n=1 computing a function  f n : {0, 1} n →{0, 1}  n , where for input length n the size is size(C n )= s(n) and depth(C n )= d(n). This paper revolves around the following question. Can we reduce the depth to o(d(n)) without simultaneously increasing s(n) too much? We propose a hypothesis 1 which asserts that this is impossible when quantifying appropriately “reduce” (for depth) and “too much” (for size). The consequences of our quantification are rather striking, including NC 6⊆ SC that reads as “it is generally impossible to trade efficient size-depth parallel algorithms for simultaneously time-space efficient algorithms”. Depth Irreducibility Hypothesis (informal statement). Fix any sublinear depth d(n)= o(n) and polynomial size s(n)= poly(n). Then, there is a family of circuits C = {C n } with depth(C n ) ≤ d(n) and simultaneously size(C n ) ≤ s(n), such that every D = {D n } which computes the same function with depth(D n )= o(d(n)) blows up size(D n ) = “above quasi-polynomial”. 1 A form of this hypothesis was made in a statement of a theorem in [PQT13]. This is an unpublished (in fact, never circulated) manuscript about Group Isomorphism. I think this hypothesis, properly parameterized, is valuable in its own right. 1 ISSN 1433-8092