IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES, VOL. 59, NO. 4, APRIL 2011 1117
A 2-Gb/s 130-nm CMOS RF-Correlation-Based
IR-UWB Transceiver Front-End
Lei Zhou, Associate Member, IEEE, Zhiming Chen, Student Member, IEEE,
Chun-Cheng Wang, Student Member, IEEE, Fred Tzeng, Member, IEEE,
Vipul Jain, Student Member, IEEE, and Payam Heydari, Senior Member, IEEE
Abstract—This paper presents a carrierless RF-correla-
tion-based impulse radio ultra-wideband transceiver (TRX)
front-end in a 130-nm CMOS process. Timing synchronization
and coherent demodulation are implemented directly in the RF
domain, targeting applications such as short-range energy-effi-
cient wireless communication at gigabit/second data rates. The
6–10-GHz band is exploited to achieve higher data rate. Binary
phase-shift keying modulated impulse is generated by edge com-
bining the delayed clock signal at a lower frequency of 2 GHz to
avoid a more power-hungry phase-locked loop at higher frequency
(e.g., 8 GHz). An on-chip pulse shaper inside the pulse generator
is designed to provide filtering for an edge-combined signal to
comply with the Federal Communications Commission spectrum
emission mask. In order to achieve 25-ps delay accuracy and
500-ps delay range for the proposed two-step RF synchronization,
a template-based digital delay generation scheme is proposed,
which delays the locally generated trigger pulse instead of the
wideband pulse itself. Occupying 6.4 mm of chip area, the TRX
achieves a maximum data rate of 2 Gb/s and a receiver (RX) sen-
sitivity of 64 dBm with a bit error rate of 10 , while requiring
only 51.5 pJ/pulse in the transmitter mode and 72.9 pJ/pulse in
the RX mode.
Index Terms—CMOS, correlator, edge combination, im-
pulse-radio (IR) ultra-wideband (UWB), pulse generator, RF
front-end, synchronization.
I. INTRODUCTION
U
LTRA-WIDEBAND (UWB) technology is one of the
candidates for gigabit/second short-range wireless com-
munication due to its extremely large bandwidth and low
emission level allowed by the Federal Communications Com-
mission (FCC).
As has been widely investigated during the past decade,
there are two different approaches to utilize the 3.1–10.6-GHz
UWB band: multiband orthogonal frequency-division mul-
Manuscript received June 24, 2010; revised December 20, 2010; accepted
January 26, 2011. Date of publication March 07, 2011; date of current version
April 08, 2011. This work was supported in part by a National Science Founda-
tion (NSF) Grant under Contract CRI-0551735 and by the Qualcomm Corpora-
tion.
L. Zhou was with the Electrical Engineering and Computer Science Depart-
ment, University of California at Irvine, Irvine, CA 92697-2625 USA. He is
now with Quantenna Communications Inc., Fremont, CA 94538 USA (e-mail:
leiz@uci.edu).
Z. Chen, C.-C. Wang, F. Tzeng, and P. Heydari are with the Electrical Engi-
neering and Computer Science Department, University of California at Irvine,
Irvine, CA 92697-2625 USA (e-mail: payam@uci.edu).
V. Jain was with the Electrical Engineering and Computer Science Depart-
ment, University of California at Irvine, Irvine, CA 92697-2625 USA. He is now
with SaberTek Inc., Irvine, CA 92614 USA.
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org.
Digital Object Identifier 10.1109/TMTT.2011.2114190
tiplexing (MB-OFDM) and impulse-radio UWB (IR-UWB).
The IR-UWB presents less circuit complexity and low power
consumption, which will extend the mobile devices’ battery
life and lead to small form factor. The UWB band is divided
into two bands to avoid in-band interference from the 5-GHz
wireless local area network (WLAN), i.e., the lower band (3–5
GHz) and upper band (6–10 GHz). Several research studies
have focused on implementation of UWB systems at the lower
band [1]–[9]. Although the upper band provides wider band-
width and less interference from other existing wireless bands,
due to the design challenges, only recently, UWB transceivers
(TRXs) on the upper band have been demonstrated [10]–[14].
References [10] and [11] exploit the upper UWB band, while
targeting low data rate for localization and sensing applications.
In [13], a CMOS IR-UWB transmitter (TX) has been reported,
which achieves a 750-Mb/s data rate at 6–10-GHz band.
Of particular importance in handheld devices is the power
consumption. Due to the short duration of the UWB pulses,
conventional carrier-based TRX architectures require power-
hungry ADCs with multigigahertz sampling rates. Correlation
in the analog domain, nevertheless, relaxes the speed and res-
olution requirements of ADCs by demodulating the received
signal at the front end. Analog correlation can be implemented
in the RF/IF/baseband (BB) domain, thereby leading to different
architectures. In [15], the received signal is downconverted to
IF frequency for correlation with IF template pulses, which are
pre-stored in high-speed on-chip memories. For IR-UWB sys-
tems using phase modulation to achieve higher sensitivity and
modulation efficiency, correlation at the IF frequency, however,
loses the polarity of the received phase-modulated signal due
to the quadrature downconversion. In [2], a binary phase-shift
keying (BPSK) receiver (RX) working at sub-1-GHz band is re-
ported to achieve synchronization at BB. However, due to the
unknown phase in carrier frequency, the RX requires both
and channels for synchronization, thereby doubling the power
consumption. Designing the correlator at the RF frequency, on
the other hand, leads to a simple and energy-efficient solution,
suitable for gigabit/second short-range wireless applications.
Nevertheless, RF correlation requires highly accurate syn-
chronization. More precisely, the RF synchronization mandates
the misalignment between the received signal and locally gen-
erated template to be within the picosecond range. In addition,
the symbol synchronization for demodulation requires the tem-
plate pulse to be delayed over the whole pulse repetition time
(PRT) (in the nanosecond range). Retaining the UWB pulse
shape while achieving such large delay range at the RF frequen-
cies in a 130-nm CMOS process is challenging.
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