Abstract This paper describes a design environment and platform developed to support senior capstone design projects in computer engineering that incorporates the concept of hardware/software codesign. A proposed capstone design project which utilizes this environment is also presented. This project is being undertaken by senior computer engineering students for the first time this year at the authors’ university. 1. Introduction The authors have been involved in several efforts to develop senior capstone design projects for computer and electrical engineering students [1,2]. The project described in [2] was specifically designed to expose the students to issues, techniques and tools used in hardware/software codesign. Although this effort was very successful and well received by the students, the project has been in use for several years and needed to be updated to re- energize student interest if nothing else. More importantly though, the limited capabilities of the microcontroller and small FPGAs used in the previous efforts limited the complexity of the systems the students could undertake. In addition, the fact that the students had to design and code all of the low level routines and interfaces for communication between hardware and software tasks meant that they were spending significant time getting those details to work and not enough on the overall system function, both in terms of the software and hardware. The result was that although all of the groups were successful in getting their systems to function as a communicating hardware and software unit, they were most often not able to achieve the ultimate goals of the project due to lack of time. To address these issues, the authors decided to adopt a more powerful hardware/software platform as a standard for senior capstone design project, and to develop a library of hardware/ software interfaces which the students could use to implement the required hardware/software communications for their system. They can use these routines as-is, or they can use them as a starting point for any specific hardware/software communications protocol they might need. Section 2 describes the standard hardware/software platform to be used in the senior design projects at VCU. Section 3 describes the library of hardware/software communications routines under development for the senior capstone design projects. Finally, section 4 describes the example project students will be undertaking this Spring at VCU using the hardware platform and communications library. 2. Miniature Embedded Reconfigurable Computer and Logic System The block diagram of the Miniature Embedded Reconfigurable Computer and Logic (MERCAL) module is shown in Figure 1. There are two primary components to the MERCAL module. They are the DIMM-PC and a Xilinx FPGA. The DIMM-PC is a commercially available, functionally complete, extremely compact (40 X 67 X 6 mm) PC motherboard containing either a 66 MHz 486SX or a 133 MHz AMD Elan SC586, onboard memory consisting of 16 to 32 Mbytes of RAM and a 16 to 32 Mbyte Flash Disk. The DIMM-PC peripheral interface consists of two serial ports, one parallel printer port, and keyboard, floppy, and IDE Hard disk controller ports. In MERCAL, the printer port is dedicated to the task of programming the Xilinx FPGA. Since this device is an SRAM based FPGA, it is possible, with software that has been developed, for the DIMM-PC to reconfigure the FPGA to satisfy the digital logic requirements for various applications. The FPGA used in MERCAL is the Xilinx XC2S150 Spartan-II in a PQ208 package. About half of the available I/O pins on the FPGA are used to interface to the DIMM-PC and the others are available external to the MERCAL module through connectors. The XC2S150 Spartan-II FPGA contains the equivalent of 150,000 gates with 200 MHz system performance. The interface to the MERCAL module provides 81 general- purpose input output (IO) pins from the FPGA. The functions of these IO pins can be determined by the needs of the application and controlled by the configuration of the FPGA. Top and bottom views of the actual MERCAL module are also shown in Figure 1. 3. Hardware/Software Communications Library In order to assist the students in rapidly developing their project implementations, a library of standard hardware/software communications interfaces is being developed. Each interface contains a standard set of software procedures, developed in C which form an API for the particular interface. Using these routines, the user can send or receive data to/from the hardware across the interface and in some cases, configure or read the status of the interface. In the MERCAL system, these routines execute on the DIMM-PC when called by the application program. Each interface also contains a hardware module, written in synthesizable VHDL, that communicates with the software API routines across the Figure 1. The Mercal Module Block Diagram Top View Bottom View DIMM PC PC Bus XILINX FPGA XC2S150-PQ208 I/O 81 pins Printer Port Interface RS 232 Interface Selected Signals 32 MHz clock A New Hardware/Software Codesign Environment and Senior Capstone Design Project for Computer Engineering Robert H. Klenke, Jerry H. Tucker, Jason M. Blevins Department of Electrical Engineering Virginia Commonwealth University Richmond, VA 23284 Proceedings of the 2003 IEEE International Conference on Microelectronic Systems Education (MSE’03) 0-7695-1973-3/03 $17.00 © 2003 IEEE