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Non photosensitive, Vertically Redundant Two-Channel a-Si: H Thin Film Transistor Yue Kuo iBM T J. Watson Research Center, Yorktown Heights, New York 10598, USA ABSTRACT An amorphous silicon a-Si:H thin film transistor (TFT), which has (i) two separate channels vertically stacked, (ii) two gate electrodes, i.e., one on the top and the other one at the bottom, and (iii) a self-aligned source/drain to bottom gate structure, is presented and studied. This TFT is not sensitive to light illumination because the channels are enclosed by two opaque gate electrodes. It has an 'off less than 10-12 A, an 1JL5 ratio greater than 106, and a subthreshold slope of 0.42 V/decade. When both gate electrodes are driven, the value of 4,, is higher than the sum of the two separate values of 4,, corresponding to each gate electrode driven individually. The high performance of the two-channel TFT is due to the field enhancement from both the top and the bottom gates. Amorphous silicon (a-Si:H) thin film transistors (TFTs) have been the dominant device in high quality, large area liquid crystal displays (LCDs).' They are also used in solid-state imagers, detectors, sensors, and electrical erasable programmable read-only memories (EEPROMs).2 An a-Si:H TFT has two intrinsic disadvantages: low field effect mobility Oteff) and high photosensitivity. Although there are many efforts for improving the mobility, for example, by varying the bulk and interfacial properties of a-Si:H and the gate dielectric, it is still limited to less than 1.5 cm2/V s. To further improve the mobility, the a-Si:H layer needs to be replaced by other materials, such as polysilicon or cadmium selenide (CdSe). The photosensi- tivity problem can be solved by several methods: (i) using a trilayer structure with a proper top channel passivation layer; (ii) thinning the a-Si:H layer thickness; (iii) intro- ducing defect centers in the a-Si:H layer, and (iv) adding a light blocking layer.26 The first two methods are effective in decreasing the photoleakage current, but they cannot totally eliminate the photosensitivity. The third method is rarely used in real applications because it deteriorates other transistor characteristics such as the Peii The light blocking layer, which can be a polymeric or a metallic material, is most commonly applied to TFT LCD products. When an organic polymer is used, a thick layer is required due to its low optical density. When a metal layer is used, it is usually deposited on the opposite plate of the TFT plate. The light from the backlight source could be reflect- ed from the metal pattern to the top of the TFT, which causes photoleakage.7 In addition, these light blocking layers are passive devices that do not enhance the TFT performance. In order to increase the large area TFT array production yield, many redundant structures, e.g., for dielectric layers and metal lines, are used. They are effective in preventing defects such as shorting between the top and bottom metal lines and opening of the metal lines. Few structures can supply redundant TFTs, which are critical to random defects. There are reports on supplying two TFTs to one pixel.8 They occupy double the area of one TFT, which decreases the aperture ratio (AR) of a pixel. For LCD applications, the AR directly influences the display per- formance and the power consumption. Therefore, it is desirable to have a redundant TFT structure that occupies the same area as one TFT. Figure 1 shows a TFT that has a vertically redundant two-channel structure. Both channels share the same source and drain. It occupies the same area as a conven- tional single-channel TFT. It also has two gate electrodes, i.e., one on the top and one at the bottom. Since both chan- nels are enclosed by the two gate electrodes, light from either the top or the bottom of the transistor cannot reach these channels. A similar type of dual-gate TFT has been reported.9 However, it does not have the redundant channel structure because it has only one a-Si:H layer. In addition, when both the top and bottom gates are turned on, its off current, 'off is high, e.g., close to 10" A. This is due to the lack of the top passivation layer for the a-Si:H channel, such as that in a trilayer TFT. A proper interface between a-Si:H and its channel passivation layer lowers the off current.'° Electrochemical Society Active Member Fig. 1. Cross section of vertically redundant two-channel IFL Bottom SINX /Thitom Gate \ Glass Substrate